CIMdata PLM Industry Summary Online Archive

17 May 2004

Product News

Magma Announces New Design Solutions for Low-cost Programmable IC Platforms

Magma® Design Automation Inc. announced unified synthesis and physical design products for FPGA and low-cost structured ASIC designs. With the addition of these products Magma now offers designers a common implementation flow for FPGA, structured-ASIC and standard-cell designs.

Blast FPGAT is Magma's RTL-to-FPGA solution. This new product leverages the same advanced RTL synthesis technologies of Blast CreateT, Magma's RTL-to-placed-gates solution, and the physical synthesis technologies from PALACET, Magma's flagship product for programmable logic devices. PALACE is available to a large FPGA customer base and continues to provide users with an average of 20 percent better timing and 10 percent smaller area than most competitive tools.

Magma's Blast SAT is the first complete RTL-to-GDSII solution for structured-ASIC designs. Blast SA builds on the production-proven gain-based synthesis technologies in Blast Create, Blast Fusion® and Magma's unified data model. It supports structure-specific RTL synthesis, physical synthesis, DFT designs, clock generation and noise-aware routing for multiple types of structured ASICs in nanometer technologies, and provides a fast and predictable path from RTL to structured-ASIC silicon.

"The development cost of a complex 90-nanometer design is expected to reach over $40 million and will take seven to nine months to complete," said Behrooz Zahiri, director of marketing for Structured and Programmable Solutions at Magma. "For lower-volume, less-complex chips, designers need more cost-effective design solutions. With the introduction of Blast FPGA and Blast SA, Magma extends its leadership in IC implementation solutions for cell-based designs, and now provides IC designers a full range of design solutions that are easy to adopt and offer high quality of results, as well as rapid turnaround time."

Both Blast FPGA and Blast SA are built on Magma's unified data model and use a common user interface. This eliminates the need for different point tools, makes it easy to migrate between design flows and minimizes the learning curve. Blast FPGA and Blast SA products can process the same RTL code, design constraints, settings and industry-standard data formats as Blast Create and Blast Fusion, resulting in seamless migration between FPGA and ASIC designs.

Both Blast FPGA and Blast SA products use a common data structure to guide the implementation process. Magma's FPGA-like, architecture-specific mapping and optimization maximize logic utilization and performance, while its ASIC-strength methodology and open data model provide designers with maximum flexibility and automation. Automatic chip floorplan creation for a target device can guide synthesis in mapping logic or memory elements directly to FPGA and structured ASIC on-chip resources, yielding higher quality of results (QoR). Magma's highly constraint-driven physical synthesis, coupled with embedded timing analysis and routing, provides correct-by-construction implementation. With these key technologies, Blast FPGA and Blast SA eliminate design iterations, ensure superior QoR and provide fast turnaround.

"As the FPGA industry leader, high-volume customers are rapidly adopting low-cost innovations from Xilinx through our Virtex-II Series EasyPath solutions and Spartan 3 family," said Steve Lass, director, software product marketing at Xilinx. "Meeting a design's timing requirements while using a slower speed grade device is a significant way to lower costs. Magma's PALACE FPGA physical synthesis tool provides an excellent way to gain these results."

"Altera has had an excellent working relationship with the FPGA team at Magma over several years, delivering some great technology to our mutual customers," said Tim Southgate, vice president of Software Marketing at Altera. "We're glad to be continuing that collaboration and that Magma is now providing additional FPGA and structured ASIC design solutions to the engineering community."

"The single-chip and ASIC-like architecture of Actel's flash-based ProASIC Plus FPGAs are ideal for cost-sensitive applications," said Dennis Kish, vice president of Marketing at Actel. "Magma's fully automated PALACE physical synthesis technology designed for Actel devices has offered a tremendous performance gain, while eliminating unnecessary design iterations, resulting in cost savings and shortened design cycles. We expect the same superior quality of results and ease of use from Magma's new unified BLAST FPGA solution."

"Providing our customers with state-of-the-art design technologies to complement our silicon is critical to our success," said Tim Saxe, vice president of Engineering at QuickLogic. "The Aplus team worked closely with us to adapt their physical synthesis and placement technologies to our architecture. I was impressed by the combination of integration and flexibility of their system, and expect to see more benefits now that they can draw on the other technologies of Magma." Magma acquired Aplus Design Technologies in July 2003.

"Structured ASIC technology offers performance and gate densities comparable to ASIC while delivering an extremely fast turn-around time similar to FPGAs. We are pleased to partner with Magma to deliver a comprehensive RTL to silicon flow in the Blast SA product," said Elli Yaniv, general manager at Flextronics Semiconductor. "Magma's unified, innovative design solution will accelerate the rate of structured ASIC design starts and enable a standard ASIC flow with FPGA-like ease of use."

"Virage Logic's ASAP LogicT Metal Programmable cell libraries provide standard cell-like performance and density while providing significant savings in NRE costs associated with mask generation," said Brani Buric, senior director of product marketing at Virage Logic. "Virage Logic is pleased to extend its partnership with Magma to jointly offer a structured-ASIC alternative solution for our mutual customers."

"We are very pleased with the efforts to integrate Magma's existing design tools into Faraday's MPCA design kits," said Hsin Wang, associate vice president of Technology at Faraday. "Our recent collaboration has already resulted in significant performance and runtime improvements. This cooperation with Magma is accelerating Faraday's global leadership in the structured ASIC market place."

"We are extremely pleased to be part of Magma's powerful entry to the structured ASIC space with Blast SA," said Zvi Or-Bach president and CEO of eASIC. "The integration of Magma's proven winner RTL to layout and the most advanced LUT-based synthesis, from the recently acquired Aplus, together with our breakthrough structured eASIC technology, create all together the best-of-class ASIC solution from RTL to production."

Blast FPGA and Blast SA products can be previewed at the Design Automation Conference in San Diego, June 7-11. They will be available in production release in August 2004 with pricing starting at $50,000 per year for a three-year license. Register online for a demo at DAC at http://www.magma-da.com/dac

 

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