CIMdata PLM Industry Summary Online Archive
18 May 2004
Implementation Investments
Aspex Semiconductor Uses Cadence Encounter Platform to Implement 130nm Linedancer Processor
Cadence Design Systems, Inc. ( http://www.cadence.com ) announced that Aspex Semiconductor, a fabless semiconductor company delivering ultra high performance, software programmable processors, has successfully taped out its LinedancerT processor using 130nm technology at 300MHz using the Cadence® EncounterT digital IC design platform. Responding to the demand of customers serving such markets as communications, Web services and imaging markets, Aspex redesigned the device at 130nm, incorporated new features and reduced the die size and power consumption. The Encounter platform enabled Aspex to reach its market window and meet all design and performance goals.
Signal integrity was a key design challenge for Aspex at 130nm. Using the Encounter platform's CeltICT signal integrity technology, elimination of cross talk and reduction of design iterations were realized within three weeks. Timing closure was successfully achieved at 300MHz with First Encounter® silicon virtual prototyping. The best-of-breed technology behind the Encounter platform demonstrates again that the platform provides an integrated and fast route to higher-quality silicon through wire-centric design.
"We were thrilled with the whole Encounter design flow from Cadence," said Dr. Ian Jalowiecki, vice president of engineering at Aspex Semiconductor. "Resolving signal integrity and timing closure issues at 130nm painlessly, we were able to meet our design goals within a very aggressive market window."
Become a member of the CIMdata PLM Community to receive your daily PLM news and much more.
Tell us what you think of the CIMdata Newsletter. Send your feedback.
CIMdata is committed to your privacy. Your personal information will never be sold or shared outside of CIMdata without your express permission.