CIMdata PLM Industry Summary Online Archive

24 May 2004

Product News

Celoxica Releases C Synthesis Toolkit for Altera SOPC Builder

Celoxica, Ltd., the technology provider in C-based synthesis and system-level design, announced availability of the DK Accelerator for Altera's SOPC Builder. The DK Accelerator generates FPGA hardware components directly from Handel-C descriptions for use in the SOPC Builder system development tool. The DK Accelerator, combined with SOPC Builder, provides a fast and automated implementation path for C-language algorithms to system-on-a-programmable chip (SOPC) designs.

SOPC Builder, an automated system integration tool included within the Altera Quartus II design software, lets system designers define and implement an SOPC design by specifying the building blocks or components. The Celoxica DK Accelerator for the SOPC Builder tool enhances this flow by automatically generating SOPC Builder components directly from C-language descriptions of custom algorithms. For each algorithm, the tool automatically converts the software into FPGA logic that the SOPC Builder tool can integrate along with other components to provide critical product differentiation. The created components can be used and re-used in the same manner as other off-the-shelf components.

The DK Accelerator for SOPC Builder tool is now available from Celoxica. The design software provides cycle-accurate simulation and synthesis of algorithms to Altera FPGA devices from Handel-C, a superset of ANSI-C for hardware synthesis. The toolkit also includes automatic generation of SOPC Builder component interfaces and an API for component interaction with an embedded processor.

An innovator in system-level electronic design automation (EDA), Celoxica supplies the design technology, IP and services that define Software-Compiled System Design, a methodology that exploits higher levels of design abstraction to improve silicon design productivity. Celoxica's products address hardware/software partitioning, co-verification and C-based synthesis to reconfigurable hardware.

 

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