CIMdata PLM Industry Summary Online Archive
25 May 2004
Implementation Investments
Synopsys Announces National Semiconductor Standardizes on Synopsys VCS, Leda, and Formality for Company-Wide Use
Synopsys, Inc. ( http://www.synopsys.com ) announced National Semiconductor Corporation has standardized on its' VCS® RTL verification solution, the cornerstone of the DiscoveryT Verification Platform, Leda® programmable design checker, and Formality® functional equivalence checker. Advanced, built-in verification technologies in VCS, the pre-packaged rules and ease of use of Leda, and the performance and capacity delivered by Formality enable National Semiconductor's verification teams worldwide to reduce overall verification time while delivering higher quality products.
"VCS delivers the performance, capacity and built-in verification technologies we need to effectively verify our most complex designs," said James Lin, vice president of the Technology Infrastructure Group at National Semiconductor. "The comprehensive coverage capabilities built into VCS are widely used at National Semiconductor because they are fast, easy to use and improve verification quality. Additionally, the new built-in full-featured testbench and assertion technologies in VCS will further improve our verification productivity."
"After evaluation of various tools in the market place, we have standardized on Leda and Formality for their technology and performance advantages," said Dennis Lau, senior manager of the Design Tools Group, at National Semiconductor. "Leda addresses our need for a powerful, configurable RTL and netlist checker and Formality delivers the performance and capacity needed to perform equivalence checking on our large designs. Combined, VCS, Formality and Leda enable us to develop high-quality SoCs."
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