CIMdata PLM Industry Summary Online Archive
14 June 2004
Product News
Actel's Libero IDE Delivers Industry's Best Mix of Design Tools, Superior Functionality and Ease-of-Use
Actel Corporation introduced Libero Integrated Design Environment (IDE) version 6.0. The streamlined IDE integrates design tools and delivers flexibility and efficiency for today's complex, time-sensitive field-programmable gate array (FPGA) designs. Providing enhanced functionality and performance, all editions of Libero 6.0, including its free Silver edition, now include Synplify® Actel Edition (AE) software, Synplicity's synthesis tool specially optimized for Actel's flash- and antifuse-based FPGAs.
"Actel's latest Libero IDE stands as a testament to the company's commitment to building strong relationships with cutting-edge EDA tool vendors," said Saloni Howard-Sarin, tools marketing director at Actel. "As FPGAs continue to push the envelope in terms of performance, we recognize that third-party software companies like Synplicity and Magma Design Automation possess the expertise to provide top-notch front-end design tools. By joining forces with these companies, Actel is able to leverage this superior technology and offer customers the best mix of design tools the industry has to offer."
Also, for the first time, Libero customers may purchase Synplicity's high-end synthesis tool, Synplify Pro® AE, directly from Actel at a significant cost savings. In addition, users can access a full version of Magma Design Automation's PALACE (Physical and Logical Automatic Compilation Engine) physical synthesis tool directly from the Libero 6.0 interface. The design environment also boasts new ease-of-use improvements and additional updates to other industry-leading third-party tools.
Now available for free with all versions of Libero 6.0, Synplicity's Synplify AE software includes Synplicity's SCOPE Editor, which allows users to add timing and other constraints through a GUI. In addition, Actel Libero Silver and Gold users now have access to other features not previously enjoyed, such as the Hierarchical Netlist Browser, batch or command line mode (for floating licenses), and interface to the HDL Analyst.
Choosing the Synplify Pro AE software as an add-on to Libero 6.0, users can incrementally design Actel FPGAs using Synplicity's MultiPointT technology. The technology creates interface logic models (ILMs) based upon user-defined compile points, allowing parts of a design to remain unchanged while others are synthesized, resulting in better quality of timing and area results, faster runtime and the advanced handling of large designs. Also included in the Synplify Pro software is Synplicity's HDL Analyst® tool that automatically generates an RTL graphical view and post-map schematic view of the design for fast code analysis and debug. Other performance enhancement features such as re-timing/register balancing are also available in the Synplify Pro software.
Bridging synthesis and place-and-route to improve timing and performance for Actel's flash-based ProASIC Plus devices, Magma's PALACE software is now bundled with Libero Platinum 6.0 and can be summoned directly from the Libero 6.0 interface. Magma's PALACE is fully compatible with any synthesis tool, including Synplicity's Synplify and Synplify Pro tools, further contributing to its seamless operation within Libero 6.0.
SynaptiCad's WaveFormer Lite 9.6 has also been upgraded to support a reactive test bench, which compares test bench models against actual output results, greatly simplifying analysis of simulation timing results. With Verilog Change Dump (VCD) import, WaveFormer Lite enables the import of IEEE 1364 standard waveforms. Further, Libero 6.0 includes an enhanced version of Mentor Graphics' ModelSim HDL simulation environment.
Multiple ease-of-use features enhance Libero's highly intuitive IDE. For instance, an update to Actel's Project Manager allows users to build and test revisions to their design by saving multiple trial implementations. Improvements to Actel's MultiView Navigator include a new active messaging system that standardizes and streamlines messages and design flow; logic cones, which extend netlist viewer functionality; and an enhanced netlist mapper and prelayout checker. Additionally, Actel's ACTgen supports significant GUI menu-driven enhancements, further improving usability and speeding timing closure. Addressing the growing base of Linux users, Actel's Designer expands UNIX support to Red Hat Linux 8, Red Hat Linux 9 and Solaris 9.
Libero 6.0 IDE is available in three editions: Platinum, Gold and Silver. Libero Platinum is a complete solution with unlimited design capacity and customer support and is priced at $2495. For users designing system-level devices of 300k gates or less, Actel offers its Libero Gold edition, which is priced at $595. The Libero Silver edition may be used free of charge via Actel's Web site. The Synplify Pro AE add-on, which can be used with any Libero or Designer edition, is priced at $3500 annually and requires a separate license.
Actel Corporation is a supplier of innovative programmable logic solutions, including field-programmable gate arrays (FPGAs) based on antifuse and flash technologies, high-performance intellectual property (IP) cores, software development tools and design services, targeted for the high-speed communications, application-specific integrated circuit (ASIC) replacement and radiation-tolerant markets. Founded in 1985, Actel employs more than 500 people worldwide. The Company is headquartered at 2061 Stierlin Court, Mountain View, CA, 94043-4655. Telephone: 888-99-ACTEL (992-2835). Internet: http://www.actel.com
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