CIMdata PLM Industry Summary Online Archive

28 June 2004

Product News

Virage Logic Introduces Ultra-Low-Power Semiconductor IP Platform, Allowing Up to 20X Reduction in Static, 80 Percent in Dynamic Power Dissipation

Virage Logic Corp. ( http://www.viragelogic.com ) announced IPrima Mobile, an application-optimized semiconductor IP platform that minimizes and effectively manages power dissipation without paying a performance penalty. IPrima Mobile is the first offering in Virage Logic's IPrima family of application-optimized semiconductor IP platforms.

"Portable consumer and wireless personal communication products will be market drivers for the semiconductor industry over the next five years. Growth rates for many of these products will average more than 30 percent annually," said Morry Marshall, vice president strategic technologies at Semico Research Corporation. "The potential power savings and longer battery life offered by the IPrima Mobile platform will provide a real competitive advantage to Virage Logic's customers."

The IPrima family of application-optimized semiconductor IP platforms brings together a wide range of IP components in a single, integrated IP platform comprising memories, logic and I/Os. IPrima Mobile enables a broad range of power management methods to control both static and dynamic power consumption; including such advanced optimization techniques as full block-level voltage islands, clock gating, mixed-transistor threshold voltage support, voltage frequency scaling, back biasing and state retention standby mode. With IPrima Mobile, designers can determine the optimum level of power dissipation reduction for their application's performance requirements.

"IPrima Mobile builds on Virage Logic's three-plus years of silicon-proven low-power IP products to provide SoC designers with a single, integrated IP platform that enables them to efficiently develop consumer products with longer battery life and lower electromagnetic interference (EMI) emissions," said Jim Ensell, vice president of marketing at Virage Logic. "By delivering up to 20X reduction in static and 80 percent reduction in dynamic power dissipation, IPrima Mobile gives our customers the ability to rocket past their competitors in terms of battery life, one of the key features consumers care about."

"We have used Virage Logic memories with many of our designs; however, our latest SignaKlaraT embedded technology used in a wide range of portable and wearable devices required ultra-low-power and ultra-miniature IP," said Peter Balsiger, president of Dspfactory SA. "We selected the IPrima Mobile memories and standard cells after an extensive evaluation resulted in significant power and area savings that are required for our latest designs."

To fully maximize IPrima Mobile's advanced power-optimization features, Virage Logic has established strategic partnerships with leading electronic design automation (EDA) tools developers, IP companies and foundries. This ensures a complete and reliable design flow, support for protocols such as the ARM® Intelligent Energy ManagementT (IEM) technology, and optimization of performance and energy dissipation with respect to manufacturing costs.

"Optimizing power consumption has become a system-level issue. To generate the best combination of optimal energy dissipation and adequate computing performance, enhanced EDA tools and optimized IP platforms must work smoothly together," said Eric Filseth, vice president of marketing for digital IC implementation at Cadence Design Systems. "Virage Logic's IPrima Mobile was designed to work with our Cadence Encounter low-power design flow, the leading solution to analyze and optimize power for nanometer designs."

"It's significant that Virage Logic is making its first IPrima Mobile platform offering available on TSMC's 0.13-micron process," said Edward Wan, senior director of product marketing in design services at TSMC. "The consumer electronics market is an important one and IPrima Mobile's power-optimization techniques, together with TSMC's outstanding manufacturing capabilities, will provide significant benefits."

The Virage Logic IPrima Mobile platform includes:  

•  Area, Speed and Power (ASAP) MemoryT Ultra-Low-Power (ULP) Memories-single- and dual-port ASAP SRAMs; single- and dual-port STAR (Self-Test and Repair) SRAMs; single- and dual-port RF (Register Files) and Read Only Memories (ROM).

•  ASAP LogicT Ultra-Low-Power (ULP) Standard Cell Library-Based on the ASAP Logic patented routing methodology and cell architecture and the Ultra-High-Density (UHD) Standard Cell set, the ULP Library typically provides up to 30 percent improvement in area when compared to conventional standard cell libraries while consuming 20 percent less dynamic and 7X less static power at nominal voltage thresholds. Level shifters are included as part of the ULP Library for power management.

•  Base I/O Cells and Mixed-Signal Blocks-Extended operating voltage range CMOS buffers; SSTL-2 Class I and II; HSTL Class I and II; PCI and PCI-X transceivers; and USB1.1

Virage Logic's IPrima family of application-optimized semiconductor IP platforms delivers integrated, technologically advanced and differentiated IP and supports well-defined system-level design methodologies targeted to specific market applications. The IPrima Platforms meet the critical requirements of reducing SoC costs, boosting performance and ensuring reliability, while satisfying shrinking development budgets and improving time-to-profitability. Virage Logic's IPrima family of application-optimized platforms include products for market segments such as consumer, data communications and networking, computer and graphics, and portable and handheld. The IPrima platforms include optimized components such as:

•  Memory IP products crafted for application-specific requirements in terms of type, size, area, performance and power dissipation

•  Standard Cell libraries to implement customer-specific differentiation and high-value system blocks

•  Input/Output (I/O) cells for basic and high-performance, application-specific interfaces

•  IPrima Mobile Availability

The Virage Logic IPrima Mobile platform is available now on the TSMC 130nm process. Support for additional foundries and process technologies from 130 to 65nm will also be made available. IPrima Mobile Platform pricing starts at $150,000.

 

Become a member of the CIMdata PLM Community to receive your daily PLM news and much more.

Tell us what you think of the CIMdata Newsletter. Send your feedback.

CIMdata is committed to your privacy. Your personal information will never be sold or shared outside of CIMdata without your express permission.

Subscribe