CIMdata PLM Industry Summary Online Archive
September 2004
Product News
HDL Works BV Presents EASET 5.2
HDL Works announced the release of version 5.2 of EASE, the ideal design entry environment for VHDL, Verilog and mixed language designs for FPGA and ASIC. Synthesis and simulation tool independency enables the user to select his most favorite tools while setting-up a complete design flow. EASE continues to be the most intuitive design entry environment in the market, while offering all necessary features for both advanced and novice HDL designers.
What's new in EASE 5.2
Many improvements have been made in this new version. These changes include Tcl driven version management with support for ClearCase, RCS and Synchronicity Design Sync, Verilog 2001 support and a new project browser.
In EASET
Version management
• Synchronicity DesignSync support
• Tcl interface to Version Management tools
• Allow combined check-in/check-out
New log window for messages
Company packages
Graphical Copy & Paste
Find an object in the diagram
Verify from marker
Improved HDL flow (third party tool interfacing)
Improved HDL Import (fuzzy parser to determine file dependencies)
Import subtree from other Ease project
User interface improvements
• Startup Dialog
• License Wizard
• User options in tree navigator dialog
• Mouse feedback when drawing
• Unconnected net/port visibility
• Improved Generic dialog
• New color widget
State diagram settings
• Default settings
• Improved dialog
• Added clock enable
• Added HDL code of global transitions at the end of the state decoding.
• Visualization of state diagram properties
Verilog support
• Initial statement
• Improved Verilog 2001 support
• Non-blocking assignments in HDL code of state diagrams.
Completely new project browser
Hierarchical VHDL configurations
Option to ignore synthesis pragma's
Ask for output filename when generating 'all-in-one' file
Skip HDL generation of linked library
Improved HDL generation for bus rippers
Automatic scrolling in diagram
In EALET
Identifier expansion under cursor
Improved language templates
Tabs to select an editor window
Popup menu in the edit windows
Added language support for Edif, Perl and SystemC
EASE simplifies the coding and debugging stage of the flow and enables design groups to quickly produce state of the art design code which is easy to overlook and maintain. EASE offers the best of both worlds with your choice of graphical or text based HDL entry, while automatically generating optimized HDL c ode in your preferred language-VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on the same EASE project. EASE is designed to improve productivity and communication in design teams.
Availability and Pricing
EASE 5.2 is now available. Prices begin at US$4,000. An evaluation copy can be downloaded from the company's web site: http://www.hdlworks.com
HDL Works develops and markets high-performance, intuitive tools for complex HDL design across a wide spectrum of applications. Its software products are available on the industry's most popular workstations and personal computer platforms. HDL Works currently holds EASE, EALE and HDL Companion in its product portfolio. Headquartered in Ede, The Netherlands, HDL Works is privately held.
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