CIMdata PLM Industry Summary Online Archive
7 September 2004
Implementation Investments
Cadence Incisive Conformal Technology Becomes Standardized Solution for Fujitsu Worldwide
Cadence Design Systems, Inc. announced that Fujitsu Limited has standardized worldwide on the Cadence® IncisiveT Conformal® equivalence checking solution for verifying the application-specific integrated circuit (ASIC) requirements of its highly complex, multi-million-gate system-on-chip designs.
"Fujitsu's leading-edge chip and system technology has resulted in some of the most advanced designs available for digital audio-visual and communications applications," said Kazuyuki Kawauchi, General Manager, Design Methodology Development Division, LSI Group, Fujitsu Limited. "We've utilized the Conformal technology for four years and have tested it extensively for all our ASIC flows. Incisive Conformal is our equivalence checking solution of choice because of its superior performance, capacity and the ease with which the tool could be deployed to our design teams. Our design teams can reap the benefits of efficient and comprehensive verification from RTL to netlist, helping speed time-to-market and maximizing first-pass silicon success."
Incisive Conformal technology checks the functional equivalence of different versions of a design at various critical stages and enables the designer to identify and correct errors as soon as they are introduced. The result is faster, more accurate bug detection and correction throughout the entire design flow. By providing complete verification coverage, re-spin risk is minimized.
"Incisive Conformal equivalence checking is one of the best complete solutions available that meets our RTL flow requirement," Kazuyuki Kawauchi continued. "Approximately 400 Incisive Conformal licenses are being used by Fujitsu engineers in our design and verification flows, and its unique abilities to verify complex optimizations have resulted in many successful tape-outs."
"The feedback from working closely with our customers, such as Fujitsu, enables us to find new ways to enhance our technology to help compress the verification cycle and ease the burden presented by the verification bottleneck," said Michael Chang, vice president of R&D, Incisive Formal Verification division, Cadence. "Collaboration with customers like Fujitsu helps ensure that we meet the requirements of their next-generation designs, as well as the needs of their customers across the silicon design chain."
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