CIMdata PLM Industry Summary Online Archive
7 September 2004
Product News
Major Productivity Enhancements to Zuken's Desktop PCB Design Suite CADSTAR Include Faster and More Accurate Automated Routing
Zuken announces CADSTAR 7.0, a major revision to its scalable, front-to-back desktop PCB design suite. Enhancements include increased routing precision for high-density and miniaturized boards, improved place-and-route automation, definition of lengthening track patterns constraints through a graphical user interface, and a new search tool for finding components and other design items faster. A tool for simulation and verification, CADSTAR SI Verify eliminates unnecessary design iterations and is available as an option with the CADSTAR 7.0 solution.
Using the upgraded tool suite, placement can now be done with 1/1000th degree precision, enabling even the most densely populated boards to be accurately placed and tight design constraints to be set. This feature is also important for designers of integrated circuit test boards, as test probing points need to be meticulously defined.
The place-and-route editor within the tool suite has additional customization and scripting options to improve user productivity. Custom menus can be created, keyboards can be re-mapped to match the requirements of individual users or host systems, and comprehensive scripting references have been added. New routing wizards guide users, via a graphical user interface, through step-by-step automated routing routines for complete boards. Copper pour can now be configured to automatically re-pour whenever there are changes. This enables the user to route through copper area, and the copper will be re-poured to prevent errors.
Where track lengths need to be adjusted to achieve timing goals, a lengthening wizard has been introduced that allows users to choose their preferred track pattern, via a pull-down menu, for lengthening individual tracks or differential pairs.
Another improvement is the ability to define constraints within component footprints. If the component is moved, the constrained footprint area automatically moves with it. Also, the search tool is now faster and easier to use when locating components or other design elements.
Higher performance routers in the P.R.Editor XR 2000 and 5000 families can also be specified as add-on options with CADSTAR 7.0. Amongst other enhancements, constraints can be defined in terms of both length and delay.
In addition, the high-speed versions of the routers enable skew constraints to be set, making it easier to route buses while ensuring that all nets are routed within defined tolerances, preventing timing problems and improving signal integrity control.
The CADSTAR SI Verify module provides post-layout simulation and verification. Operating at up to Gigabit speeds, the tool uses a transmission line simulation approach to analyze reflection and crosstalk effects and also facilitates real interconnect timing and delay analysis. It incorporates a graphical scenario editor, layer stack definition for optimization of impedances and layers, an EMC device library, and the option to perform interactive simulation or batch simulation. Using CADSTAR SI Verify cuts design iterations, particularly in high-speed and densely populated designs where design 'rules-of-thumb' are no longer accurate enough.
CADSTAR 7 is available now, and costs from € 3,650 / $3,495.
CADSTAR is a Windows-based solution for PCB design that spans schematic capture, placement, routing, library creation and management, signal integrity, EMC analysis, and production of manufacturing data. CADSTAR also features internet-accessible libraries of over 100,000 components, a 3D design tool, automatic and high-speed routing, variant management, and signal integrity management and verification. It provides users with a competitively priced, scalable solution for designing simple or complex, multilayer PCBs. For more information visit: http://www.cadstarworld.com/
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