CIMdata PLM Industry Summary Online Archive
7 September 2004
Product News
TransEDA Announces PCI All-in-One Verification IP and VN-Control 3.0 for PCI ExpressT, PCI-X® and PCI Based Designs
TransEDA announced the availability of its PCI All-in-One verification IP and its latest VN-Control bus-based system-level test generator release 3.0. Based on existing production-proven technologies, the PCI All-in-One verification IP accelerates adoption of the new PCI Express interface standard for next-generation designs previously supporting PCI-X or PCI interfaces. The PCI All-in-One verification IP provides a single, compatible programming interface which enables verification teams to reuse their tests on systems containing any combination of PCI Express, PCI-X and PCI buses. The new version of the VN-Control test generator works with TransEDA's verification IP for PCI Express, PCI-X, PCI, Intel processor buses, or user-created verification IP to speed up debugging and provide greater flexibility for creating bus activity and tests.
The PCI All-in-One verification IP accommodates testing of various system-level configurations such as systems containing PCI Express buses only, a combination of PCI-SIG® standard buses, or a single PCI-SIG standard bus selectively enabled. Facing the challenges of verifying these different configurations and busses, engineering teams easily create tests with a compatible application programming interface (API) that accesses the bus functional models supplied with the PCI All-in-One verification IP. Greatly reducing engineering effort, these tests can then be reused to verify any of the buses and corresponding interfaces. To ensure thorough testing, additional APIs are provided for creating tests specific to each bus protocol and different protocol layers. TransEDA's PCI All-in-One and its other verification IP are compatible with the VN-Control test generator and third-party commercial testbench tools.
The latest version of the VN-Control test generator creates more sophisticated system-level tests and contains an enhanced debug data display. Robust design verification requires simulating many real-world conditions. New functionality in VN-Control enables simulating erroneous transactions and conditions, which in turn thoroughly tests the error-recovery capabilities of the design-under-test. VN-Control drives this error-injection simulation without the need for user intervention by utilizing new status information from the bus functional models. In addition, the VN-Control test generator provides a new debugging format that highlights corrupted data, a prelude to system failure.
The PCI All-in-One verification IP and the 3.0 version of the VN-Control bus-based system-level test generator are available now. North American and European pricing begins at $15,900 for the PCI All-in-One and $10,600 for VN-Control.
TransEDA verification IP for PCI Express, PCI-X 2.0, PCI-X 1.0, PCI, and Intel processor buses are also separately available.
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