CIMdata PLM Industry Summary Online Archive
9 September 2004
Implementation Investments
eSilicon Successfully Tapes Out Complex/High Performance SoC Using Magma IC Implementation System
eSilicon Corporation, a custom chip supplier, announced that it has successfully taped out a 0.18-micron system-on-chip (SoC) design to TSMC's LV process using Magma's Blast CreateT and Blast Fusion®, an integrated RTL-to-GDSII design flow. The design targets color imaging applications, including a primary application for the printer market.
"For this design eSilicon had to meet a variety of challenges, including a very aggressive performance target, a very small die size and a tight schedule, while remaining 100 percent pin-compatible with the previous version of the design," stated Hao Nham, vice president and general manager of Design Services for eSilicon. "eSilicon has taped out many designs at the .13 and .18 micron level; the productivity of Magma's integrated logic and physical design system allowed us to meet the challenges on this design and complete the job on time and within specification."
The new design reached its increased performance target of 170MHz, up from the previous rate of 92MHz, largely because the combined Magma Blast Create and Blast Fusion solution was able to reduce the number of logic levels by nearly 50 percent. The suite also allowed eSilicon to integrate several analog and mixed-signal blocks onto the chip while maintaining a very small die size. Final routing of the design was completed in less than 12 hours on a Linux 2.8GHz, single CPU machine.
"The success of the eSilicon design demonstrates how easy and straightforward it is to migrate legacy designs into the Magma flow, and to immediately see improvements in area, performance and power," said Yatin Trivedi, director of product marketing at Magma Design Automation . "We are very happy to see the world-class design team at eSilicon deploy Blast Create and Blast Fusion on multiple SoC designs targeted at the 0.18- and 0.13-micron processes."
Blast Create provides a predictable path from RTL to placed gates. It is a unified environment for logic synthesis, physical synthesis, design for test (DFT) analysis and scan insertion, power optimization and static timing analysis.
Blast Fusion includes technology in all areas of physical design including placement, optimization, clock tree synthesis (CTS) and routing. New capabilities and algorithms allow designers to improve quality of results (QoR), runtime, and manufacturability and yield.
On September 17th, Jack Harding, CEO of eSilicon, will present a keynote address at MUSIC, Magma's third annual users group conference. The speech is entitled, "It's not just a tapeout: A new development model for 130 nanometer and beyond." The MUSIC conference will be held in Santa Clara, Calif. and is open to all Magma user companies.
eSilicon Corporation is a full-service provider of custom chips to the world's leading electronics companies. Headquartered in Sunnyvale, Calif. with offices in Allentown, Pa., and Murray Hill, N.J., eSilicon has approximately 80 employees. For more information about eSilicon, visit http://www.eSilicon.com
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