CIMdata PLM Industry Summary Online Archive

1 October 2004

Product News

Y Explorations Releases Version 3.0 of eXCite, C Synthesis Tool

Y Explorations Inc. announced the release of eXCite 3.0, the latest version of its behavioral synthesis tool for generating top-quality ASIC/FPGA hardware from untimed ISO/ANSI-C descriptions.

eXCite v3.0 delivers rapid, powerful architecture exploration to meet tough design constraints in days rather than months, and synthesizes RTL results that often exceed hand-coded design quality.

First introduced in 2001, the eXCite product line uses behavior and interface synthesis technology developed over 15 years in academia and industry to reduce RTL implementation time, improve performance and reduce size.

"Our extensive experience with the challenges of high-level design automation lets us combine the best algorithms with feedback-driven user control so that our customers can quickly achieve great RTL results," said Y Explorations CEO Tedd Hadley.

eXCite takes pure ISO/ANSI-C descriptions with untimed interface behavior and generates many possible architectures based on user-guided transformations, interface selection and performance/area tradeoffs. For example, the user may select one C loop to be unrolled, removing a memory bottleneck by allowing an array to be automatically transformed to registers. eXCite allows the user to select a hierarchy of nested C loops to be pipelined with maximum throughput, choose between a FIFO or pipelined memory-based input/output behavior, and select three pipelined multipliers to be automatically shared throughout the behavior, all in the same design iteration.

eXCIte v3.0 adds hierarchical synthesis and reuse capability to eXCite's synthesis flow, automatically synthesizing functions and function calls by utilizing Y Explorations' Reuse AutomationT interface and database technology. This reduces synthesis and verification times, as well as providing the foundation for customer-defined RTL libraries of proprietary C algorithms.

"With the leading-edge technology provided in Y Explorations' latest release, such as the new capabilities in hierarchical design and reuse, we expect to markedly improve our C-based design flow, allowing system designers to easily implement their hardware designs," said Teruaki Tanaka, head researcher of Advanced Technology R&D Center, Mitsubishi Electric Corp. "eXCite v3.0 will become a powerful solution for mixed SW/HW embedded system-design environments."

In addition, eXCite v3.0 provides design quality analysis to determine critical paths and area, giving the user the necessary feedback for the next design iteration.

To complete the design flow, eXCite v3.0 automatically generates a testbench after synthesis that is used to compare the original C behavior with the RTL behavior for verification signoff.

When the design target is achieved, advanced synthesis constraints, such as false-path and multicycle constraints, are automatically output so that logic synthesis tools can generate the desired results without a lot of tweaking by expert users.

Y Explorations Inc. offers electronic design automation software that enables the rapid and effective design of embedded systems and reuse of complex semiconductors. YXI's products are used by designers of integrated circuits including system-on-a-chip, for next-generation telecommunication and networking systems and devices, as well as portable electronic products such as cell phones, computers and printers. YXI's behavioral and interface synthesis software allows a seamless design flow between design specification and today's hardware design flow.

For further information, please e-mail: info@yxi.com

 

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