CIMdata PLM Industry Summary Online Archive
11 October 2004
Implementation Investments
PalmChip Qualifies Cadence Encounter Synthesis for AcurX SoC Platform
Cadence Design Systems, Inc. announced that PalmChip Corp. has qualified Cadence® EncounterT RTL Compiler for implementation of PalmChip's popular AcurX system-on-chip (SoC) platform. With Encounter RTL Compiler, critical storage core IP blocks of the AcurX platform achieved up to three times faster run times than with PalmChip's previous synthesis solution. Cadence synthesis also helped PalmChip improve timing results and decrease gate counts.
"At PalmChip, we were able to get up and running quickly with Encounter RTL Compiler on our AcurX SoC platform IP blocks," said Jauher Zaidii, president and CEO of PalmChip. "We found that Encounter RTL Compiler ran two to three times faster than our existing synthesis solution and produced timing results that were 5 to 10 percent faster, as well as a 10 percent area reduction."
The PALM-DP-2000 AcurX platform is a CoreFrame-based configurable SoC platform. It contains all peripheral functions required for a basic SoC and includes options to select from a suite of library components ported to the platform. This platform currently supports MIPS4K series, ARC, ARM7TDMI, and ARM9TDMI embedded processor cores. The CoreFrame architecture is inherently processor independent, allowing other processors to be easily integrated, including PowerPC and Tensilica. The platform also can be used as a companion chip for high-performance stand-alone processors.
Encounter RTL Compiler delivers global synthesis for timing closure and low power designs to provide PalmChip with important low power design chain technology. Its unique set of global focus algorithms maximizes the performance of the most challenging designs. It works with existing design flows to increase chip performance, decrease design times, and provide the highest quality of silicon (QoS).
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