CIMdata PLM Industry Summary Online Archive
17 November 2004
Company News
Toshiba Achieves Significant Success in Adoption of Verilog-AMS Language Design with the Mentor Graphics Mixed-Signal Simulator, ADVance MS
Mentor Graphics Corporation announced that Toshiba Corporation has achieved significant success in the adoption of analog/mixed-signal HDL language, Verilog-AMS, for the design and verification of complex analog and mixed-signal LSI (large scale integration) designs. The Verilog-AMS support in Mentor Graphics® mixed-signal simulator tool, ADVance MST allows the functionalities of LSIs to be validated earlier and more efficiently through the design cycles. Toshiba intends to continue deploying the ADVance MS tool in other projects to reduce the turn around time of their LSI designs.
"System verification for analog/mixed-signal LSI is becoming more challenging than ever due to the increasing circuit complexity," said Mr. Takao Ito, senior manager of analog design CAD department, System LSI second business unit, Toshiba Corporation Semiconductor Company. "Through high quality behavioral modeling in Verilog-AMS and good collaboration with Mentor, we were able to accomplish great results in the top-down design and bottom-up verification methodology with the ADVance MS tool. It is important to expand this methodology to other application areas to continue offering high quality analog/mixed-signal LSI to meet our customer's requirements."
"Efficient analog/mixed-signal verification is important in the design of reliable products. It becomes even more critical when high-quality complex analog/mixed-signal SoC is demanded under short time-to-market pressure," said Mr. Takeshi Yamamoto, manager of System LSI first unit, Toshiba Corporation Semiconductor Company. "The analog/mixed-signal language-based design approach, with the ADVance MS tool and Mentor's CommLib behavioral model library, enabled efficient analysis of large circuits, while traditional analog or mixed-signal simulator did not go well. In addition, the availability of fast-Spice simulation technology, the Mach TAT tool, under the ADVance MS tool allows sophisticated analysis to be completed overnight."
The Mentor Graphics ADVance MS (ADMS) tool is a single-kernel, language-neutral functional verification environment for digital, analog, mixed-signal and RF circuits. This platform is built upon four high-performance, customer-proven simulation technologies: the EldoT tool for analog, ModelSim® for digital, Mach for transistor-level, and the Eldo RF for radio frequency simulations. The ADMS supports most of the design languages, including VHDL, VHDL-AMS, Verilog, Verilog-AMS, SystemC, SystemVerilog, Spice, and C, for the design and verification of mixed-signal system, and SoC. ADMS has gained wide acceptance since its introduction five years ago. It is currently used in hundreds of customer sites.
"With Toshiba's superior circuit design expertise and Mentor's cutting-edge AMS modeling and simulation technologies, we have implemented a highly advanced, yet realistic, methodology based on top-down design and bottom-up verification," said Jue-Hsien Chern, vice president and general manager, Deep Submicron Division, Mentor Graphics. "We believe that our collaboration with Toshiba will continue to benefit both companies."
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