CIMdata PLM Industry Summary Online Archive
15 December 2004
Company News
Nassda Granted Patent for Hybrid Circuit Timing Analysis
Nassda Corp . announced it has been issued a patent by the United States Patent and Trademark Office for its method of describing a hybrid system of static analysis and dynamic simulation for IC design verification. The patent, #6,820,243, covers technology which is used for circuit-level timing and crosstalk analysis of leading-edge custom digital designs at 130nm processes and below.
"This patent forms the basis for a new innovative approach to circuit-level timing analysis," said Graham Bell, Senior Director of Marketing. "It describes the next-generation capability needed for the complex nanometer designs which chipmakers face today. For leading-edge custom digital designers, verification can no longer be limited to either dynamic or static analysis at the circuit-level. We believe our innovative hybrid technology in HANEXT delivers a new level of accuracy and performance by optimizing the advantages of both dynamic and static analysis methods."
HANEX uses a hybrid of dynamic and static methods to automatically identify critical paths, including the impact of crosstalk effects on signal timing for custom CMOS digital designs with millions of elements. HANEX fills the gap between pure static analysis methods and the need for more accurate timing simulation to ensure success in the latest nanometer silicon processes at 130nm and below.
"For high-performance digital designs, many engineers who use static analysis experience insufficient timing accuracy because of undetected dynamic nanometer effects such as crosstalk," Bell stated. "As a result, digital IC manufacturers can produce silicon that fails to meet performance objectives even though static timing sign-off analysis has been completed. We believe HANEX delivers results with the accuracy of dynamic simulation and the speed and comprehensive coverage of static analysis."
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