CIMdata PLM Industry Summary Online Archive
11 April 2005
Product News
Magma Introduces Blast DFT: an Advanced, Integrated, New Generation Design-for-Test Solution
Magma® Design Automation Inc. announced the availability of Blast DFTT, Magma's advanced test solution. Blast DFT is an important component of Magma's recently announced, next-generation Cobra development initiative providing a Physically Aware DFTT solution integrated within the overall RTL-to-GDSII flow. This new generation, design-for-test product, leverages Magma's unified data model to offer demonstrably improved designer productivity without impacting Quality-Of-Results.
With advanced Logic and Memory BIST (built-in self-test) capabilities, Magma's DFT solution is natively architected to efficiently target subtle defect mechanisms that are starting to dominate silicon quality at today's advanced process geometries. The solution supports both flat and hierarchical design styles, providing scalability for complex SoC (system-on-chip) designs implemented in advanced processes, such as 90- and 65-nanometer technologies. Designs with hundreds of embedded memories can be processed in minutes.
"Until now, DFT has been an afterthought to the design process," said Kam Kittrell, general manager of Magma's Logic Design Business Unit. "Magma has integrated a comprehensive portfolio of test methods into its unified RTL-to-GDSII environment resulting in improved test quality. Thus, Blast DFT provides an easy-to-use flow and establishes an infrastructure for Physically-Aware DFT that will be leveraged for yield enhancement and productivity gains. Given that embedded memories often consume a significant percentage of die area, it is essential that we provide an automated memory BIST solution. Early customer experience shows that Magma's feature rich solution is being readily accepted and is providing a much-needed alternative to existing solutions. We're delighted that leading memory suppliers ARM and Dolphin Technology have chosen Blast DFT to help customers improve yield." (Note: see related news announcements on Monday, April 11, 2005.)
Blast DFT is fully integrated within Magma's RTL-to-GDSII flow and provides comprehensive design-for-test methods including full scan, TAP and Boundary Scan insertion, Memory BIST (MBIST) and Logic BIST (LBIST). This solution consists of generated RTL components that are synthesized on-the-fly and automatically merged into the host design. Automatically generated simulation test benches are used for functional verification, and automatically generated IEEE 1450 (STIL) patterns are used for manufacturing test. The solution provides measurably improved designer productivity, faster turnaround time and enhanced predictability of timing closure for final silicon quality.
Boundary Scan and TAP Controller (BSCAN)
BSCAN provides automatic generation and insertion of an IEEE 1149.1 compliant test access port (TAP) and boundary scan register. A boundary scan description language (BSDL) file, Verilog testbenches and IEEE 1450 (STIL) patterns, are automatically generated.
Memory BIST (MBIST)
MBIST provides at-speed built-in self-test (MBIST) for embedded memories, including single- and dual-port SRAM, multi-port register files and ROM. The product offers comprehensive memory-test algorithm support, including user selection from a pre-defined library, custom defined algorithms and run-time programmable algorithms. Support for two dimensions of redundancy gives automated solutions for memories that have row, column, or row and column redundancy, as well as support for soft, hard, and composite built-in self-repair strategies. Different scheduling modes are available, including support of memory retention tests. Built-in diagnostics provide easy management of different levels of diagnosis, including address, bit, and full-failure bit-map generation.
Logic BIST (LBIST)
LBIST builds upon the existing full-scan infrastructure by providing a modular, at-speed logic built-in self-test (LBIST) capability. A pseudo random pattern generator (PRPG) and multiple input signature register (MISR) for results compaction are used. LBIST supports at-speed testing of designs with multiple clock domains and any number of scan chains. Flexibility is provided by using various clocking methods and protocols, including both launch-from-shift and launch-from-capture methods.
LBIST also provides an automatic test pattern generation (ATPG) option for detecting faults not detected by LBIST. Several test modes are provided, including a default mode and run-time programmable modes. Flop-level diagnostics are supported. Software is provided for rules checking and repair, ensuring design compatibility with the LBIST technique. Final fault coverage reports and expected signatures are automatically generated.
Availability and Demonstration
Blast DFT is available now from Magma Design Automation. This advanced DFT technology will be demonstrated at the Design Automation Conference (DAC) in Anaheim, Calif., June 13-16, 2005, at Magma's booth #2250.
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