CIMdata PLM Industry Summary Online Archive

10 May 2005

Product News

Synopsys Delivers Industry's First Single-Vendor PCI Express IP Solution to Pass PCI-SIG Compliance

Synopsys, Inc . announced that it's DesignWare® PHY and digital controller intellectual property (IP) for the PCI ExpressT standard is the first Data Link and PHY solution from a single vendor to pass compliance by the PCI-Special Interest Group (PCI-SIG). Combined, the DesignWare PHY, digital cores and verification IP for the PCI Express interface provide a complete, proven solution for designs incorporating PCI Express connectivity into system-on-chip (SoC) designs. Proven, compliant IP solutions reduce risk and shorten time to market for designers using these complex interfaces.

The DesignWare PHY for the PCI Express interface integrates high-speed, mixed-signal custom CMOS circuitry that is fully compliant with the PCI Express 1.1 specification and the PIPE interface standard. While low in power consumption and silicon area, the DesignWare PHY substantially exceeds the electrical specifications in such key performance areas as jitter margin and receive sensitivity. The family of PCI Express digital cores from Synopsys is designed with a high-performance, pipelined architecture for maximum sustainable throughput while achieving low latency and a low gate count. Using the Synopsys PHY and digital controller cores together greatly reduces the risk of interoperability failure between the complex digital protocol layers and high-speed analog interfaces.

"As the leading provider of PCI Express IP, we have taken an active role in lowering the total cost of ownership for our customers using this faster protocol," said Guri Stark, vice president of Marketing in Synopsys' Solutions Group. "Our customers depend on us to save them money when they deploy PCI Express technology because they get a solution that is verified to their application and hardened with substantially less Link-PHY integration risk."

Availability

DesignWare digital cores for the PCI Express interface, including endpoint, root complex, dual mode and switch/bridge, as well as the DesignWare PHY IP are currently available. DesignWare verification IP for the PCI Express interface is available today for no additional charge to current DesignWare Library and DesignWare Verification Library licensees.

About DesignWare Cores

Synopsys DesignWare Cores provide system designers with silicon-proven, digital and mixed-signal connectivity IP for some of the world's most recognized products, including communications processors, routers, switches, game consoles, digital cameras, computers and computer peripherals. The DesignWare Cores family includes industry-leading connectivity IP such as USB 1.1, 2.0, OTG and USB PHYs, PCI, PCI-X®, PCI ExpressT, PCI Express PHY, SATA, IEEE 1394 and Ethernet standards. Provided as synthesizable RTL source code or in GDS format, these cores enable designers to create innovative, cost-effective systems-on-chip and embedded systems. Synopsys provides flexible licensing options for the DesignWare Cores. Each core can be licensed individually, on a fee-per-project basis or users can opt for the Volume Purchase Agreement, which enables them to license all the cores under one simple agreement.

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