CIMdata PLM Industry Summary Online Archive

24 January 2005

Product News

Magma Announces PALACE Support for Actel's Third-Generation Flash-Based ProASIC3 and ProASIC3E FPGAs

Magma® Design Automation Inc. announced that Magma's PALACET software design tool for programmable logic supports Actel's new high-speed, low-cost, third-generation flash-based ProASIC3 and ProASIC3E FPGA (field programmable gate array) families. Fully integrated into Actel's Libero Integrated Design Environment (IDE), PALACE has proven to increase the performance of the ProASIC3 and ProASIC3E field programmable gate arrays (FPGAs) by one speed grade or more.

Magma's PALACE enables customers of Actel's new flash-based ProASIC3 and ProASIC3E FPGA devices to significantly improve performance without manual intervention. Extensive benchmarking of PALACE, within Actel's Libero IDE over a wide range of designs, has demonstrated increased average performance of one speed grade (15 percent) to up to 50 percent performance gain, compared with existing synthesis methodologies. By reducing the number of iterations, PALACE offers designers additional cost savings and time-to-market gains by shortening design time. Additionally, PALACE offers area utilization improvements of up to 10 percent, often enabling customers to fit a design into a smaller, less expensive device.

"Our long-term collaboration with Magma benefits Actel customers by enabling them to achieve breakthrough FPGA performance with our new third-generation, low-cost, flash-based FPGAs," said Dennis Kish, vice president of marketing at Actel Corporation. "By integrating Magma's PALACE into our Libero IDE, ProASIC3 and ProASIC3E, designers have a seamless, easy-to-use and optimized design environment for faster and more assured development of tomorrow's value-based applications."

"Magma's PALACE provides Actel customers with an easy-to-use solution that fits into most commonly used FPGA design flows," said Kam Kittrell, general manager of Magma's Logic Design Business Unit. "Building on previous PALACE success with Actel's ProASIC Plus devices enabled Magma to provide full support for Actel's ProASIC3 and ProASIC3E families. These new devices represent a major step forward in low-cost FPGAs, and, combined with Magma's PALACE, deliver impressive high-performance and predictable results to Actel's customers."

PALACE addresses the high-performance requirements of today's challenging FPGA designs. PALACE unifies logic synthesis and physical design, providing an efficient physical synthesis engine for FPGAs that includes constraint-driven optimization, architecture-specific mapping, and unique support for multi-cycle on-chip communication. PALACE has consistently demonstrated at least one speed grade performance improvement over a wide range of FPGA architectures through push-button physical synthesis. This approach results in highly optimized designs with significant performance improvement without manual user intervention, floorplanning, or iterations.

Availability

PALACE for Actel's ProASIC3 and ProASIC3/E families is available now. Fully integrated into Actel's Libero IDE (integrated design environment), customers interested in PALACE for third-generation, flash-based Actel designs, can obtain pricing and other information from Actel Corporation by calling 888-99-ACTEL (992-2835) or visiting Actel's web site at http://www.actel.com .

 

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