CIMdata PLM Industry Summary Online Archive
27 March 2008
Implementation Investments
STARC Establishes Variation-and-Yield-Aware Design Methodology Using Mentor Graphics Calibre LFD
Mentor Graphics Corporation announced that STARC (Semiconductor Technology Academic Research Center), a research consortium co-founded by eleven major Japanese semiconductor companies, has successfully evaluated the Calibre® LFD™ tool for the litho-aware design flow portion of its variation- and yield -aware design methodology.
“At 65nm and below, process variation aware design flows are essential to ensure that complex designs can be manufactured efficiently and reliably,” stated Nobuyuki Nishiguchi, Vice President and General Manager, Development Dept.-1, STARC. “The number of variables that must be considered is too great to address with traditional design rules alone. STARC is building a methodology that augments conventional rules with accurate models of manufacturing process variability to guide engineers in making optimal design decisions.”
The Calibre LFD (Litho Friendly Design) product is a production- and silicon-proven electronic design automation (EDA) tool that addresses the urgent need to manage lithographic process variability in the early stages of design creation. As part of its STARCAD-CEL (STARC Aid your Design with Certified Engineering Linkage — one step ahead of DFM) project, STARC will use the Calibre LFD tool as a key element in its variation-and-yield-aware design methodology to predict the effects of lithography variations. The STARC methodology employs this information to create more robust designs that produce higher yields and consistent performance.
Analysis of how manufacturing process variations affect design yields is becoming a critical issue for designers at 65nm and below. The Calibre LFD tool allows designers to identify litho hot spots and other layout topologies that are sensitive to process variations and primary contributors to systematic failure. By accurately simulating the effects of the lithographic process on “as-built” layout geometry, the Calibre LFD tool enables designers to make trade-off decisions early, resulting in a design that is more robust and less sensitive to the lithographic process window. This level of analysis is important at the 90nm technology node and crucial at the 65nm node where even small process variations can greatly influence silicon yield.
“Previously ignored manufacturing effects are now becoming critical to design success,” said Joe Sawicki, vice president and general manager, Design to Silicon Division, Mentor Graphics. “Design-for-Manufacturing tools like Calibre LFD make it possible to address the challenges of maintaining high yield through design and manufacturing co-optimization.”
Become a member of the CIMdata PLM Community to receive your daily PLM news and much more.
Tell us what you think of the CIMdata Newsletter. Send your feedback.
CIMdata is committed to your privacy. Your personal information will never be sold or shared outside of CIMdata without your express permission.