CIMdata PLM Industry Summary Online Archive
2 April 2008
Implementation Investments
Plx Technology Adopts Cadence Incisive Palladium II Accelerator/Emulator for Full System Verification
Cadence Design Systems, Inc. announced that PLX Technology, a world's leading supplier of PCI Express® switch and bridge silicon for the communications, server, storage and embedded markets, has adopted the Cadence® Incisive® Palladium® II Accelerator/Emulator for its advanced system-level verification needs. PLX® cited the ease of use of the Palladium II system, a robust portfolio of Cadence® SpeedBridge® Adapters, and megahertz runtime performance as key advantages in their design flow. By implementing the Palladium II system with host and device PCI Express 2.0 SpeedBridge Adapters, PLX created a robust environment that enhanced previous FPGA-based approaches while improving system-level quality and scheduling predictability.
With a critical need to deliver system-level quality under tight schedules, PLX chose the Palladium II system approach over other verification methods. The realistic in-circuit verification environment offered a fast bring-up time to find bugs earlier in the product design cycle, and offered a different class of system interoperability and coverage when compared with traditional simulation environments.
"We can't afford to run into bugs late in the design cycle that could possibly lead to costly schedule slips," said Vijay Meduri, director of design engineering, PLX Technology. "With the Palladium II system we've been able to add significantly more stress on our design versus simulation or FPGA platforms, and add much higher levels of functional coverage to verify our latest multi-million gate designs and stay on schedule."
When in the emulation mode or when regression testing with an embedded testbench, the Palladium II delivers up to 10,000 times the average performance of other simulators by incorporating peripherals, embedded processors, multiple ASICs, embedded software, and real-world data.
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