CIMdata PLM Industry Summary Online Archive

2 April 2008

Product News

Synopsys' New DesignWare IP Significantly Simplifies Transition to PCI Express

Synopsys, Inc. announced the availability of the DesignWare® LE IP for PCI Express (PCIe) optimized for ASIC and FPGA designs that utilize a single lane (x1) PCI Express endpoint interface. The DesignWare LE IP for PCIe is a cost-effective solution that provides features to simplify the complexities of transitioning to PCI Express for applications requiring a single lane, such as existing PCI/PCI-X designs, ExpressCards, Ethernet controllers, SATA controllers and wireless hubs.

The new DesignWare LE endpoint digital controller IP for PCIe provides a simplified feature set that enables designers to benefit from a 20 percent area reduction in their ASIC or FPGA implementations while maintaining the same architecture and interfaces as Synopsys' complete DesignWare IP for PCIe solution. By maintaining interface compatibility, designers can upgrade to a full-featured version when future designs require additional functionality. The silicon-proven DesignWare LE IP is a part of Synopsys' complete PCI Express IP portfolio and has successfully passed the PCI Express compliance testing at the PCI-SIG interoperability workshops.

The DesignWare LE IP utilizes several features to lower the integration time and cost of incorporating PCI Express IP into a design. The DesignWare LE IP automatically connects the PCI Express digital controller and PHY together. During implementation, the DesignWare LE IP automatically optimizes the parameters across the PIPE interface and synthesizes the complete PCI Express interface. In addition, the new IP includes a reference design that helps designers integrate the PCI Express interface, while providing a starting point for the assembly and verification of their chip design.

"The new DesignWare LE IP for PCI Express is designed specifically to address the needs of ASIC and FPGA designers who are looking for an easy upgrade path to PCI Express IP at a competitive price point," said John Koeter, senior director of marketing for IP and Services at Synopsys. "More than 40 percent of ASICs and ASSPs that utilize PCI Express contain a single lane endpoint solution. As the technology leader for PCI Express IP, we continually invest in providing innovative products that help designers quickly integrate PCI Express interfaces while lowering risk and meeting their critical market windows."

Availability

The DesignWare LE IP for PCI Express is available immediately. For more information visit: http://www.synopsys.com/pciexpress.

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