CIMdata PLM Industry Summary Online Archive
15 April 2008
Implementation Investments
IDT Uses Cadence Encounter Conformal Constraint Designer to Accelerate Time to Market
Cadence Design Systems, Inc. said IDT (Integrated Device Technology, Inc.), a leading provider of mixed signal semiconductor solutions that enable the digital media experience, was able to deliver an IDT PanelPort™ device, an innovative DisplayPort-compatible digital display receiver and timing controller device, in part due to the use of Cadence® Conformal® Constraint Designer as a SDC constraint signoff tool. By using Encounter Conformal Constraint Designer for sign-off, IDT was able to improve the quality of the design, avoid costly design iterations and accelerate time to market for this key product.
Frequently, semiconductor designers forgo the additional step of signing off design constraints, but in doing so, they risk creating an error that could jeopardize the final chip. Encounter Conformal Constraint Designer automates the generation, validation and refinement of timing constraints used in semiconductor design. By using the Encounter Conformal Constraint Designer technology as a constraint signoff tool, IDT was able to detect, analyze and correct the constraints early in the design phase.
"Cadence offered to show us how to use Conformal Constraint Designer as a sign-off tool," said Ji Park, vice president and general manager of Digital Display Operation of IDT. "Right away, the tool identified a significant issue that would likely have caused a respin. By using Conformal Constraint Designer in this manner, it is clear that the software can easily pay for itself in added value."
"IDT is an example of a company that realized significant benefits by approaching constraint signoff in a fundamentally different way, using Cadence Conformal Constraint Designer," said Yoon Kim, marketing director for the Cadence IC Digital group. "We have every confidence that a wide variety of designs can benefit from this approach, saving design time, cost and time to market."
Encounter Conformal Constraint Designer is a key technology in the Cadence Encounter digital IC design platform and Cadence Logic Design Team Solution. It enables early logic-design signoff and automates the generation, validation, and refinement of constraints to ensure that timing constraints are valid throughout the entire design process, helping designers achieve rapid timing closure. Encounter Conformal Constraint Designer is available in L and XL offerings.
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