CIMdata PLM Industry Summary Online Archive
29 April 2008
Product News
Mentor Graphics Aligns with UMC to Validate the Accuracy of Calibre nmDRC Physical Verification UMC 65nm Deck
Mentor Graphics Corporation announced that it has worked with leading foundry UMC to validate the accuracy of UMC’s 65nm physical verification flows using the Calibre nmDRC product. Using one of UMC’s advanced 65nm customer products as the test design, the cooperative effort verified that UMC’s 65nm Calibre production decks accurately reflect the design rule manual for this node, providing UMC customers with even greater confidence in the manufacturability of their 65nm chip designs.
Because the Calibre tool’s performance and accuracy are highly valued by UMC customers, it is the first available for each new technology node, and is used internally by UMC’s engineering groups. UMC and Mentor Graphics previously partnered to demonstrate the superior performance of the Calibre nmDRC product with Hyperscaling as announced in the “Mentor Graphics Calibre nmDRC Adopted by UMC to Address Shifting Requirements for Sign-off,” press release on July 16, 2006 (see http://www.mentor.com/company/news/calibrenm_umc.cfm).
“The accuracy evaluation performed by UMC and Mentor Graphics proves that our customers have access to a leading EDA source for optimal design verification speed as well as a highly accurate verification flow,” said Lee Chung, vice president of global marketing at UMC. “As we were able to validate the accuracy of our advanced decks and optimize them for speed, we are providing customers with proven accuracy and performance solutions created to help get their designs to market faster.”
Mentor verification tools are available as part of UMC’s Foundry SoC Solutions, which include other comprehensive EDA and design support resources that complement the foundry’s leading-edge process technologies. UMC’s 65nm technology is currently in volume production at the company’s two 300mm fabs for a variety of customer products.
“Calibre customers can take advantage of the huge nmDRC performance leap by simply qualifying the latest release - realizing great performance for nanometer IC designs, and benefiting from the focus of UMC’s latest verification flow development efforts,” said Joe Sawicki, vice president and general manager for the design-to-silicon division at Mentor Graphics. “Upgrading to the Mentor nm Platform also enables customers to establish a comprehensive DFM flow with Mentor tools for critical area analysis and reduction, CMP analysis with intelligent fill, litho process checking and enhancement, design-for-test, and rapid yield learning based on volume test data.”
Calibre nmDRC is an important component of the overall Calibre nm Platform that provides customers superior solutions for DRC, LVS, extraction, critical area analysis (CAA), critical feature analysis (CFA), chemical mechanical polishing (CMP), and litho friendly design (LFD) analysis—all required to solve yield challenges of the nanometer era.
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