CIMdata PLM Industry Summary Online Archive
30 April 2008
Product News
Berkeley Design Automation Delivers Industry's First Comprehensive Noise Analysis Tool for Complex Nanometer Analog/RF Circuits
Berkeley Design Automation, Inc., provider of Precision Circuit Analysis™ technology for advanced analog and RF integrated circuits (ICs), announced the availability of a comprehensive noise analysis tool for complex analog and RF circuits. The tool, called the Noise Analysis Option™, handles every type of complex analog and RF circuit, including all analog-to-digital converters (ADCs), phase-locked loops (PLLs), DC:DC converters, frequency synthesizers, and voltage-controlled oscillators (VCOs). Leveraging Berkeley Design Automation Analog FastSPICE™ and RF FastSPICE™ technology, the Noise Analysis Option is fully compatible with existing flows, produces true SPICE accurate results, and is already silicon proven.
Device noise is insidious to GHz nanometer-scale analog and RF CMOS circuit performance. Until now, it has been either impractical or impossible to perform transistor-level analysis of the impact of device noise for many complex analog and RF circuits including sigma-delta ADCs, video DACs, fractional-N PLLs, frequency synthesizers, and wideband VCOs. Design teams have had to rely on hand calculations, system-level models, or costly silicon measurements. With the introduction of the Noise Analysis Option, Berkeley Design Automation is the first company to provide transistor-level noise analysis - including analysis of the impact of white and flicker noise - with true SPICE accuracy for every type of circuit. More than a dozen Berkeley Design Automation customers worldwide are already using the tool on production circuits.
"Device-noise-related issues have a critical impact on the design of our high-performance nanometer analog/RF and mixed-signal circuits," said Osamu Kobayashi, Director Mixed-Signal LSI Lab, System LSI Development Laboratories, Fujitsu Laboratories Ltd. "The Noise Analysis Option gives us true SPICE accurate ADC and PLL noise analysis formidably faster than traditional SPICE transient simulations that do not even include device noise on Fujitsu Laboratories circuits. It is the only tool we know that is able to deliver true SPICE accurate transistor-level noise analysis for our complex mixed-signal circuits."
The Noise Analysis Option, which is immediately available, includes the following functionality:
• Transient-noise analysis 5x-10x faster and 5x-10x higher capacity than any other tool.
• Periodic steady-state (PSS) convergence with up to 50,000 element capacity.
• Periodic noise (pnoise) analysis that has no accuracy/performance tradeoff and is 5x-10x faster than any other tool for complex circuits.
• Oscillator phase noise (oscnoise) analysis that delivers unmatched accuracy on autonomous circuits, provides node and device noise contribution, and automatically provides impulse sensitivity function (ISF) information for every node.
The tool reads standard Cadence Spectre® and Synopsys HSPICE® netlists and models. It is fully integrated into Cadence Virtuoso Analog Design Environment and can operate from a command line. It produces standard output formats and includes sophisticated post-processing.
"We design highly complex, ultra-low power RF/analog and mixed-signal SoCs for biomedical applications," said Alan Wong, Wireless IC Design Lead at Toumaz Technology. "We have significant challenges getting accurate noise analysis results with traditional RF analysis tools. Noise Analysis Option allows us to quickly analyze our oscillator and periodic blocks giving typically 5x speedup for no loss in accuracy, when compared to our existing methods."
Berkeley Design Automation tools include Analog FastSPICE™ circuit simulation, Noise Analysis Option™ device noise analyzer, RF FastSPICE™ periodic analyzer, and PLL Noise Analyzer™ stochastic nonlinear engine. The company guarantees identical waveforms to the leading "golden" SPICE simulators down to noise floor (typically 0.1% or less) while delivering 5x-10x higher performance and 5x-10x higher capacity. It achieves this by using advanced algorithms and numerical analysis techniques to rapidly solve the full-circuit matrix and the original device equations without any shortcuts that could compromise accuracy.
Design teams from top-10 semiconductor companies to leading startups use Berkeley Design Automation tools to solve big analog/RF verification problems. Typical applications include characterizing complex blocks (e.g., PLLs, ADCs, DC:DC converters, PHYs, Tx/Rx chains) and running performance simulation of full circuits (e.g., wireless transceivers, wireline transceivers, high-speed I/O macros, memories, microcontrollers, data converters, and power converters).
"Virtually every customer designing complex analog and RF circuits in nanometer CMOS has asked us to extend our award-winning Analog FastSPICE technology to provide fast and accurate circuit simulation that includes device noise impact," said Ravi Subramanian, president and CEO of Berkeley Design Automation. "With the Noise Analysis Option, we are proud to deliver the industry's first practical and comprehensive noise analysis tool for complex analog and RF circuits. The results our first dozen customers have obtained from this tool further reinforce our strong track-record in delivering silicon-accurate noise analysis for nanometer analog and RF designs."
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