CIMdata PLM Industry Summary Online Archive
20 May 2008
Product News
Apache Announces Sentinel-PI, A Global Chip-Package-System Co-Design and Co-Analysis Solution for Power Integrity
Apache Design Solutions announced Sentinel-PI, the industry’s first fully-integrated chip-package-system co-design and co-analysis solution for power integrity. Sentinel-PI provides SoC-aware modeling and analysis of the system-level power delivery network to enable IC package and PCB designers to optimize their designs, from early stage prototyping to system signoff. This latest product offering expands the company’s Sentinel platform to assist semiconductor and systems companies mitigate design risks, optimize system cost, and improve productivity.
Sentinel-PI delivers the following new capabilities in a single integrated solution:
• 3D, full-wave power network extraction and power integrity co-analysis engine
• DC, AC, and transient/dynamic analysis within a single tool
• Seamlessly integrated Chip Power Model (CPM) for SoC-aware package/board power integrity
SoC-Aware Package and PCB Power Integrity
Sentinel-PI provides a next generation 3D full-wave power network extraction and power integrity analysis engine optimized for package and PCB designs. The new engine delivers accuracy, performance, and capacity required for a complete chip-package-system co-analysis. From a single product, Sentinel-PI enables designers to perform resistance check and static IR-drop analysis (DC), frequency-domain simulation including impedance analysis of multi-port power delivery network of the chip, package, and board (AC), and time-domain dynamic voltage drop analysis (transient).
By embedding CPM, Sentinel-PI enables SoC-aware package/PCB power analysis from early in the design flow and throughout the entire process. During early design, Sentinel-PI enables accurate and predictable package selection, as well as power pad and package decoupling capacitance optimizations. Later in the design flow, Sentinel-PI allows package and PCB designers to accurately run power integrity analysis of the package and the PCB with the power delivery network behaviors of the IC, diagnose potential chip-package LC resonance issues, and validate package/board dynamic voltage noise margin.
“Power is a system-level concern that spans the chip, package and PCB. Semiconductor and system companies are looking to chip-package-system co-design to help mitigate risk, optimize cost, and improve productivity. However, traditional co-design solutions have fallen short on integration, accuracy, and interoperability,” said Dave DeMaria, senior vice president of chip-package-system at Apache. “Sentinel-PI is the company’s first product that addresses the system-wide power and noise challenges from IC, to package, to PCB by leveraging our core competencies in SoC power and noise, as well as package/PCB extraction and modeling.”
Apache will showcase Sentinel-PI, along with the Apache’s entire power, noise, and reliability solutions for chip-package-system at the upcoming Design Automation Conference in Anaheim, Ca.
Pricing and Availability
Pricing for the Sentinel-PI starts at $35,000 USD for a 1 year TBL (time-based license) and will be available in Q3 of this year.
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