CIMdata PLM Industry Summary Online Archive
18 June 2008
Implementation Investments
Synopsys Discovery AMS Enables Analog Bits to Achieve 45nm SERDES Verification
Synopsys, Inc. announced that Analog Bits, Inc. has deployed Synopsys' Discovery™ AMS, HSPICE® and HSIM™ simulators and WaveView Analyzer™ for sign-off verification of their new family of 45-nanometer (nm) 10-gigabit (Gbit) SERDES devices, which has enabled them to achieve first-silicon success. Analog Bits specializes in designing programmable interconnect solutions, such as multi-protocol SERDES, for systems-on-chips (SoCs) fabricated in nanometer CMOS logic processes.
"Analog Bits is the premier clocking IP supplier with a flawless track record of delivering first-time working silicon at the leading merchant semiconductor foundries and prestigious IDMs," said Mahesh Tirupattur, executive vice president of Analog Bits, Inc. "To maintain our record of excellence, we rely on the accuracy of the HSPICE® simulator, which is supported by silicon-verified models from each of our foundry partners. Synopsys' HSIM™ simulator provides us with high-performance functional verification of our complex analog/mixed-signal IP with 10-15X faster time to results. With the WaveView Analyzer™, we can thoroughly verify critical performance specifications of our 10Gbit SERDES, easily generating eye diagrams to measure jitter and signal integrity of our programmable interconnect solutions."
"At the latest 45-nanometer process node, the HSPICE simulator and HSIM simulator enable customers to accurately verify their analog and mixed-signal designs with the confidence they will be supported by leading semiconductor foundries," said Paul Lo, senior vice president and general manager of the Analog/Mixed-signal Group at Synopsys. "The combination of Synopsys' proven circuit simulation solution and the advanced WaveView Analyzer analysis, verification and debug tool will help enable our customers to deliver high- performance chips on time."
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