CIMdata PLM Industry Summary Online Archive
14 July 2008
Product News
Magma Introduces New Options for Knights Camelot CAD Navigation, Tightening Links Between Design and Manufacturing -- Faster 'Concept to Reality'
Magma® Design Automation Inc. introduced significant enhancements to Knights Camelot™, the industry-standard CAD navigation system, including an option making Camelot the first CAD navigation tool that enables failure analysis engineers to perform design rule checking (DRC) in the fab. Camelot's new options tighten the link between design and manufacturing, and decrease time to high-volume yield and manufacturing costs of advanced ICs.
"The enhancements and options we're announcing today enable semiconductors to go from concept to reality much faster -- this is the direct result of intense R&D efforts over the last 18 months," said Ankush Oberai, vice president of Magma's Fab Analysis Business Unit. "After nearly 20 years of providing industry-leading failure analysis, CAD navigation and yield management tools, Knights' incorporation into Magma enabled tight integration of IC implementation and fab analysis for true design for manufacturability."
The new On-Line Search Analyzer option speeds and simplifies the search function for failure analysis. One such application improves focused ion beam (FIB) modifications by automating the traditionally manual task of searching for "FIB-able" regions. In this case, the On-Line Search Analyzer performs a three-dimensional search of the layout file for areas where an FIB system can drive a beam through the circuitry to a point of interest that does not intersect or impact underlying geometric structures. This new option integrates Magma's DRC capabilities, making Camelot the first and only CAD navigation tool that enables failure analysis engineers to utilize DRC functions in the fab. With these new capabilities, users can now define applications for a variety of failure analysis and device debug techniques. This flexibility allows them to shorten cycle time for device debug and repair, and to reduce scrap.
The new Hot-Spot Analyzer option analyzes multiple regions in the layout and finds netlist segments that are close to or intersect with these regions. Typically, the regions define photon emissions (emission spots), and the nets in each hot-spot region and number of hot spots for each net are then displayed. This capability shortens the diagnostic process time with Emission Microscope (EMMI) tools.
The new Live Image Overlay option improves the accuracy of fab tool stage mechanisms that align to layout. To address the potential stage inaccuracy of many high-magnification review, analysis, probe and scanning electron microscope (SEM) tools, the Live Image Overlay option captures an image of the device under inspection and overlays the image onto the design layout. Using advanced mapping technology, it then determines key common features to both the image and layout and then aligns those features. This alignment between the image and the layout compensates for any stage inaccuracies and enables a tool to accurately utilize the design layout to drive to exact coordinates.
"This integration has multiple business benefits," Oberai said. "Because yield loss is reduced, chips that had to be discarded because they didn't function can now be sold, so lost sales can be avoided. The link between design and failure analysis means designers can spend more time designing and less time verifying that their designs are manufacturable. And the shortened turnaround time means you can get to market faster, which is the most significant advantage of all."
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