CIMdata PLM Industry Summary Online Archive

10 September 2008

Product News

CircuitSpace v3.0 - New Release Supports Complex Hierarchical Design for Printed Circuit Boards

DesignAdvance® Systems, Inc. announced CircuitSpace® v3.0. The new release adds major functionality to CircuitSpace that allows the user to design and preserve physical hierarchy throughout the layout and component placement process. As designs increase in complexity, utilizing hierarchy has long been the preferred methodology for Integrated Circuits, IC packaging, schematic capture and simulation. Now CircuitSpace v3.0 brings the hierarchical methodology to the designer at the physical layout level. Designers reduce board layout and placement time from weeks-to-minutes through patented CircuitSpace technologies such as AutoClustering™, intelligent design (IP) reuse, and Cross-Probing. CircuitSpace works seamlessly within Cadence’s Allegro PCB.

“We are impressed with the productivity gains our designers achieve with CircuitSpace,” stated Mr. Bassam Abdel-Dayem, PCB Technical Leader at Cisco Systems, Inc. “Being able to preserve the hierarchy within layout and component placement has a direct impact on time-to-market for new products, which directly correlates to profitability,” continued Mr. Abdel-Dayem.

“Since the initial release of CircuitSpace, we have worked closely with our key customers in developing the next generation intelligent EDA solutions for PCB design,” stated Mr. Edward Pupa, DesignAdvance CEO. “Bringing the hierarchical methodology to the physical layout level is a testimony to our ongoing commitment to the PCB designer,” continued Mr. Pupa.

CircuitSpace Featured Capabilities:

•    Design with physical hierarchy throughout layout and placement

•    Interactive AutoClustering™

•    Intelligent physical design reuse and replication

•    Bi-directional Cross-Probing between Layout and (PDF) Schematic

•    Automated change report between layout designs

•    Concurrent layout development corporate wide

•    Template usage with and without etch

•    Template generation for global library usage across divisions

•    Automated layout reference designator propagation

•    Advanced sustaining engineering and ECO process

Availability

CircuitSpace v3.0 will be available in early Q4 2008. Customers can see a demonstration of the new CircuitSpace solution and Allegro PCB at CDNLive Silicon Valley conference Sept. 9-11, and at the EMA Booth #41 at PCB West Sept. 14-19, Santa Clara, CA.

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