CIMdata PLM Industry Summary Online Archive
30 October 2008
Product News
Mentor Graphics Broadens Support of OVM Compliant Verification IP for IEEE802.3-2005 Gigabit Ethernet-based Designs
Mentor Graphics Corporation announced that its verification IP solution, the Questa® Multi-view Verification Component (MVC) library, has been extended to support the IEEE802.3-2005 Gigabit Ethernet standard.
Using Questa MVCs, electronic systems companies can reduce the development effort for verification environments required to validate and verify System-on-Chip (SoC) designs integrating high-speed Gigabit networking. All applications that require high bandwidth delivered by 10Gigabit Ethernet products, including high-performance computing grids and server virtualization and internet protocol television, benefit from using the Questa MVC solution. 10M/100M and 1Gigabit applications are also supported by the Questa MVC solution.
The complexity of today’s SoC verification environments often require designers to spend valuable time building, validating and verifying multiple and usually incompatible Gigabit Ethernet verification IP to support system-level, TLM-level and RTL-level verification. This lack of consistency prevents teams from easily moving between abstraction levels and maximizing verification effectiveness. By leveraging support for critical industry standards such as IEEE802.3-2005 Gigabit Ethernet, SystemVerilog and the Open Verification Methodology (OVM) with the MVC’s unique multi- view technology, designers can connect any level of abstraction from system to gate; integrated causality debug and analysis between abstractions; and compatibility with the Questa Verification Management solution – ensures consistent model behavior, fast error resolution and gives the verification team more options to improve performance and increase coverage.
The Questa functional verification platform delivers comprehensive verification and management solutions with support for all standard design and verification languages. Integrating all capabilities required for advanced functional verification of System-On-Chip (SoC) designs including constraint-solving, assertion checking, functional coverage, silicon-effects for low power and RTL/TLM debugging. In addition, the Questa platform is extended with Questa Multi-View Verification Components (MVC), Questa assertions and monitors Verification Library (QVL), the Open Verification Methodology (OVM), Questa Codelink™, and Questa Verification Management (VM), allowing the Questa platform to deliver a significant reduction in effort, cost and time for the validation and verification of the most demanding SoC designs.
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