CIMdata PLM Industry Summary Online Archive
25 November 2008
Company News
Si2’s Low Power Coalition Releases Power-Aware Design Flow and Power Reduction Documents
Silicon Integration Initiative (Si2) has released two documents on Power Aware Design Flows and Low Power Design Techniques developed by its Low Power Coalition (LPC). Both documents are available to the industry on the Si2 web site links as noted below.
The first document, “Si2 Power Aware Design Flows,” outlines a best practices approach adopted by much of the industry regarding Power Aware Design Flows and the points in the flow for power closure decisions. This information provides a description of the current state of the art in ESL algorithms and system models, RTL design and IP integration, as well as physical implementation and synthesis in regards to power-aware design flows.
The second document, “Si2 Power Reduction Stimulus and Low Power Design Techniques,” identifies and lists all known low power techniques used in minimizing power consumption in silicon and systems. The document is intended to drive the flow and format requirements and reach convergence in the areas of Pre and Post Silicon Design. All low power techniques are classified in five categories. Clock techniques are related to optimal usage of clocks. Activity control related techniques are different hooks to monitor and control activities. Voltage Techniques are related to control of operating voltage and power gating in the silicon and systems. Circuits and process are related to manufacturing processes and special circuit usage in silicon. Firmware techniques are related to software and hardware integrations in system design.
“These important documents highlight the valuable work the LPC is doing beyond the maintenance and expansion of the Common Power Format Si2 standard,” said Steve Schulz, president and CEO, Si2. “The commitment and support of the LPC working groups in producing these documents gives evidence to the relevance of the LPC and its critical mission.”
Following are links to each document:
Si2 Power Aware Design Flows: http://www.si2.org/?page=997
Si2 Power Reduction Stimulus and Low Power Design Techniques: http://www.si2.org/?page=996
The Low Power Coalition is an open industry group operating under the auspices of Si2. All interested parties are invited to join existing LPC members and participate. http://www.si2.org/?page=751
About the Low Power Coalition (LPC)
The Low-Power Coalition (LPC) is delivering enhanced capabilities in low-power Integrated Circuit (IC) design flows in particular relating to specifications of low-power design intent, architectural tradeoffs, logical/physical implementation, design verification and testability. The Low Power Coalition is an open industry group operating under the auspices of Si2. All interested parties are invited to join existing LPC members and participate. For further information on the Low Power Coalition, see http://www.si2.org/?page=726.
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