CIMdata PLM Industry Summary Online Archive
4 December 2008
Product News
Cadence Introduces Industry's First Family of MIPI Standard-Compliant OVM Multi-Language Verification IP
Cadence Design Systems, Inc. introduced six additional verification IP (VIP) to its Incisive® VIP portfolio, each designed to speed verification of designs based on the emerging Mobile Industry Processor Interface (MIPISM) standard. This unique family of VIP—for Camera Serial Interface, Display Serial Interface, UniProSM, SLIMbusSM, DigRFSM v4 and the MIPI physical layer—enables Cadence customers to verify that designs with MIPI content will work as intended and in compliance with the MIPI specification.
The introduction of the MIPI VIP family is the latest in a series of new VIP introduced by Cadence to provide customers with an extensive offering of Open Verification Methodology (OVM) VIP and unique verification and compliance automation. All Cadence MIPI VIP are OVM compliant and feature a metric-driven approach that ensures compliance to the MIPI protocol specifications. These capabilities provide customers with improved predictability to reduce schedule risks, increased productivity through reuse and automation, and high product quality from pre-packaged advanced verification and compliance capabilities.
"The fast adoption rate we’re seeing for the MIPI standard reflects the significant growth of the mobile market, and Cadence is taking the lead in quickly providing the verification IP necessary to enable this adoption," said Dave Tokic, director of VIP/IP solution and product marketing at Cadence. "Our customers are telling us that our MIPI OVM VIP has allowed them to meet their quality and challenging time-to-market goals and provides confidence that they are meeting the new MIPI standards."
Cadence has long been involved with MIPI and is a contributing member of the MIPI Alliance, a collaboration of mobile industry leaders with the objective of defining and promoting open standards for interfaces to mobile application processors.
"The availability of advanced verification IP will help all MIPI adopters more easily implement our standard," said Joel Huloux, chair of the MIPI Alliance. "We are pleased with Cadence’s participation in the Working Groups, and feel that their collaborative approach to the development of this verification IP has strengthened the MIPI specifications."
In addition to offering tremendous breadth in OVM testbench VIP, Cadence provides a comprehensive set of VIP classes applicable to block, module, chip and system-level verification. This includes assertion–based and transaction-based acceleration and emulation rate SpeedBridge® adapter products.
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