CIMdata PLM Industry Summary Online Archive

30 January 2008

Product News

Synopsys' DesignWare DDR Protocol Controller IP Integrated Into Arteris' Network-On-Chip Interconnect Solution

Arteris, a leading provider of Network-on-chip (NoC) solutions and Synopsys, Inc. announced the integration of Synopsys' DesignWare® DDR Protocol Controller IP and the Arteris NoC solution for complex system-on-chips (SoCs). This combination delivers reliable, high-speed, on-chip connectivity with low latency to external DDR2 and DDR3 SDRAM memory for advanced systems.

Applications such as digital TVs, set-top boxes, telecom and storage require high-performance data traffic between the various processor subsystems and on-chip peripherals that extend to off-chip DDR SDRAM memory. The integration of the silicon-proven DesignWare DDR Protocol Controller IP and the silicon-proven Arteris NoC solution addresses these challenges by providing designers with the necessary memory traffic bandwidth and quality of service.

"We have worked closely with Arteris to integrate the Synopsys DesignWare DDR Protocol Controller IP into the Arteris memory scheduler and NoC solution," said Joachim Kunkel, vice president and general manager of the Solutions Group at Synopsys. "Arteris' customers now have access to high-quality, pre-verified DDR Memory Controller subsystem IP, shortening design time and lowering risk."

The Arteris NoC is capable of operating at frequencies exceeding 750 MHz in a 65 nanometer (nm) process and offers link widths from 32 to 128 bits for high system bandwidth. The NoC typically uses fewer top-level wires compared to a traditional on-chip bus fabric. The highly configurable DesignWare DDR Protocol Controller IP supports the latest DDR2 and DDR3 memory devices operating at up to 1600 Mbps. Synopsys provides a complete, silicon-proven IP solution comprised of a digital controller core, mixed-signal PHYs targeting today's leading foundries and process nodes, and verification IP for subsystem and system-level verification.

"The Arteris NoC and Synopsys DesignWare DDR Protocol Controller IP solution allows designers to quickly create highly complex SoCs in deep submicron technologies, while saving significant internal development costs," said K. Charles Janac, president and chief executive officer of Arteris. "Synopsys' technology leadership in the DDR IP and connectivity IP markets makes them an ideal partner for our advanced NoC products."

Availability

The Arteris NoC IP solution and the integration kit for the Synopsys DesignWare DDR Protocol Controller IP are available from Arteris immediately.

For more information on DesignWare IP, visit http://www.synopsys.com/designware

 

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