CIMdata PLM Industry Summary Online Archive
27 February 2008
Product News
Magma Launches QuickCap TLx, a new Interconnect and Transistor Extractor
Magma® Design Automation Inc. announced QuickCap® TLx, adding advanced transistor-level extraction support to its gold-standard 3D capacitance extractor.
QuickCap TLx is integrated into Magma’s new Titan™ mixed-signal design platform, also announced today, enabling designers to simulate their design using the physical layout as input rather than an abstraction of the layout parasitics. QuickCap TLx also runs standalone and provides full support for industry standards used today in analog, memory and clock net simulation.
Traditional “geometry-based” extractors that use approximate, pre-characterized 2.5D models can’t handle the complex geometries of 65- and 45-nanometer (nm) designs, nor can they provide the needed extraction accuracy.
“Designers who run SPICE simulation, like Magma’s FineSim™ circuit simulator, require the most accurate post-layout parasitic netlist,” said Kevin Walsh, vice president of Marketing of Magma’s Physical Verification Business Unit. “Targeting the narrowest possible error, zero error, allows designers to remove excess margin and fully realize the benefits of their manufacturing technology to increase performance and profitability.”
QuickCap TLx leverages Magma technology. It uses QuickCap NX’s advanced random walk analysis approach. To provide higher throughput and scalability, QuickCap TLx uses the pipelined technology of Quartz™ DRC and Quartz LVS.
Advanced Features Target 45-nm Design Challenges
In addition to transistor-level extraction capabilities, QuickCap TLx includes new features that help address the challenges of 45-nm and finer process geometries, including:
Calculates strained silicon effects including Well Proximity Effect (WPE) and Shallow Trench Isolation (STI)
Supports standard foundry equations and is reference-flow certified
Tcl-based formulas allow for custom modifications
Improves the parallel execution capabilities of QuickCap extraction
Makes runtime scalable with design size when run on multiple machines
Enables parasitic reduction and netlist generation control
Provides threshold and analysis-based RC reduction
Includes flexible net identification, automated back annotation
Performs incremental extraction
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