CIMdata PLM Industry Summary Online Archive
26 March 2009
Implementation Investments
Mentor and NXP Achieve Major Milestone in Silicon Test Partnership
Mentor Graphics Corporation announced that Mentor and NXP have reached a major milestone in the IC manufacturing test and yield analysispartnership announced last April. A manufacturing test flow that integrates the Mentor TestKompress® ATPG product has been released to NXP designers worldwide following a comprehensive development, integration and qualification project. The new flow is designed to meet NXP's requirements for test quality and provides the highest pattern compression available.
“This is the culmination of nearly eight months of close cooperation between NXP and the Mentor Consulting Division and DFT product teams, and demonstrates exactly the kind of mutual benefits we anticipated when we entered into the agreement,” said René Penning de Vries, senior vice president and chief technical officer, NXP Semiconductors. “Having met all the qualification criteria set out by NXP, our developers are confident that this flow will meet all their test requirements. In addition, NXP can now enjoy the benefits of a commercially supported environment with an aggressive technology roadmap.”
“This partnership works because we have a common vision of test requirements and technologies, and a huge mutual respect for our respective technical skills and experience,” said Joseph Sawicki, vice president and general manager for the design-to-silicon division at Mentor Graphics. “We’re looking forward to new projects and an expanding relationship to meet the future challenges of advanced silicon testing.”
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