CIMdata PLM Industry Summary Online Archive
7 January 2009
Product News
Apache Design Solutions Introduces RedHawk-NX, the Next Generation Full-chip Dynamic Power Integrity Solution
Apache Design Solutions announced RedHawk-NX, the next generation dynamic power integrity solution re-architected to handle designs of five hundred million gates. The advanced technologies in RedHawk-NX include the industry’s first hierarchical dynamic power analysis, proprietary mesh pattern recognition and reuse, and multi-core support, enabling designers to analyze the most complex designs with sign-off accuracy.
As the semiconductor companies continue to push the capacity and performance limitations of EDA tools, Apache’s ability to deliver products that meet their demands provides key competitive advantage. Apache’s continuous investment in R&D has enabled the company to deliver re-architected next generation dynamic power solutions every three years, starting with the introduction of RedHawk-SD in 2002, RedHawk-EV in 2005, and RedHawk-NX in 2008. Each generation of products offers higher capacity and performance to address the latest design complexity in CPU, GPU, NPU, and devices with large memory contents.
“RedHawk technology roadmap is able to meet our design size and complexity needs for power noise analysis from one generation of our products to the next,” said Jean Boufarhat, vice president of engineering, from Graphics Products Group at AMD. “Specifically, RedHawk-NX allowed us to perform dynamic power noise analysis on our largest design with more than 750 million nodes. The ability to verify the entire chip including memories is critical to our design success.”
Hierarchical Dynamic (HD)
RedHawk-NX supports the industry’s first hierarchical dynamic technology allowing designers to adopt a bottom-up analysis methodology with various levels of abstraction. When using HD’s ‘white-box’ mode, the designers are able to maintain the same level of sign-off accuracy as RedHawk’s flattened analysis. By using HD’s ‘gray-box’ mode, designers gain additional capacity improvement.
Historically, hierarchical solutions were only available for static analysis where time-point-by-time-point waveform accuracy of the block-level simulation is not considered. With HD technology, IP providers can deliver encrypted Apache dynamic power views for use in full-chip sign-off analysis. HD also effectively supports industry’s hierarchical design methodologies across multiple design sites.
Mesh Pattern Recognition (MPR)
RedHawk-NX’s automatic mesh pattern recognition algorithm leverages regularity in the power/ground mesh structures enabling data reuse for effective reduction of physical memory needs. MPR handles designs with complex RDL, dense multi-layered P/G grid, and high memory content. MPR technology has been demonstrated to reduce RedHawk database memory footprint by 2-3X compared with existing techniques.
Multi-core Architecture (MC)
RedHawk-NX is re-architected to maximize the capacity and performance advantages of the multi-core processing systems. The MC solver can be scaled to handle designs with up to billion nodes in existing computing environment. With the MC technology, designers will benefit from 2-3X runtime improvements in their dynamic transient simulation, as well as MTCMOS rush current analysis.
“SoC power integrity and power induced system noise are clearly the top challenges for the semiconductor industry,” said Andrew Yang, CEO of Apache. “Power and noise is Apache’s focus and we continuously invest in R&D to maintain our ‘best-in-class’ and ‘first-in-class’ leadership position. This enables us to address customers growing design challenges and cost reduction needs.”
Pricing and Availability
RedHawk-NX will be available in Q1, 2009 as a no cost upgrade to all active RedHawk-EV customers.
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