CIMdata PLM Industry Summary Online Archive

18 May 2009

Product News

Cadence Speeds Systems Development with Automated Transaction-Level Verification

Cadence Design Systems, Inc. announced that it has delivered an extended system-level verification solution that supports the Open SystemC Initiative (OSCI) TLM 2.0 standard. This new solution natively recognizes TLM 2.0 constructs to automate debugging and analysis, and enables Save/Restart/Reset for managing long runtime test cases. With the new capabilities, systems and SoC engineers can conduct more complete transaction-level functional verification within narrowing project windows, resulting in higher-quality designs, including the development of higher-quality embedded software earlier in the project.

Cadence® is a corporate member of OSCI and a longtime contributor to its organizational and technical leadership. OSCI TLM 2.0 is an important advancement providing a standard to improve interoperability of transaction-level models and the transaction performance of those models for architecture analysis, software development, performance analysis, and hardware verification.

Cadence SystemC simulation support is part of a fully integrated multi-language, multi-level functional verification solution which now includes TLM extensions. The arrival of TLM 2.0 codifies the intent of SystemC such that the Incisive® Enterprise Simulator infers the transactional interaction information and presents TLM-aware control, visibility, and debug capabilities – providing layers of abstraction above the C++ baseline. This removes the need to manually instrument source code, and organizes transaction information, multiple processes, and synchronization actions such as events. This enables the users to intuitively debug all the interacting elements of their SystemC TLM 2.0 design, using control and debug operations at the abstraction level of transactions, as well as software breakpoints, stack variables, and method and thread data operations for data structures such as fifos and sockets.

“OSCI TLM 2.0 is of great significance for the industry where the customer’s benefits are multiplied by the support of each additional commercial product,” said Stan Krolikoski, group director of Standards and Interoperability at Cadence, and the company’s representative on the OSCI board.

Long runtimes are a common challenge for system-level verification. New Save/Restart and Reset capabilities have patent-pending extensions for SystemC/C++, enabling teams to start regressions from a deep state starting point, such as after booting the Linux OS. Saving the entire state of a SystemC/C++ program includes proper handling of pointers, memory addresses, and simulation variables - far beyond the state of a mixed-language simulation.

"Cadence SystemC simulation environment provides the high-performance, multi-language capabilities we need to verify our energy-efficient high-performance computing systems," said Bryce Denney, director of ASIC Verification at SiCortex, Inc.

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