CIMdata PLM Industry Summary Online Archive
23 January 2009
Implementation Investments
Renesas Selects EVE's ZeBu-XXL for LSI Design for Mobile Phone
EVE announced that Renesas Technology Corp. of Tokyo has selected its ZeBu-XXL (for Zero Bugs) hardware-assisted verification platform for the design of its high-speed, high-performance large-scale integrated circuits (LSIs) used in 3G mobile phones.
ZeBu-XXL was chosen after a lengthy evaluation of cost-effective, commercially available emulation platforms that could accelerate the debugging of Renesas’ system-on-chip (SoC) designs.
“Concluding our thorough analysis to select the best hardware-assisted verification platform for our needs, we picked ZeBu-XXL,” says Toshihiro Hattori, department manager of Mobile SoC Design Dept.1 of System Solution Business Unit2 at Renesas Technology Corp. “Its ease of adoption, exceptional performance while running in transaction mode reaching a top speed of 20 megahertz (MHz), and scalability from 10- and 100-million application specific integrated circuit (ASIC) gates contributed to our final decision.”
Based on an array of large field programmable gate arrays (FPGAs), ZeBu-XXL sets the standard in smallest footprint, fastest execution speed, and lowest cost of adoption. ZeBu-XXL also offers interactive and hierarchical hardware and software debugging to shrink the verification cycle of complex embedded designs by several months.
“We are delighted to be chosen by Renesas and are appreciative of its diligence in conducting the evaluation,” remarks Dr. Luc Burgun, EVE’s chief executive officer and president. “We are confident that, by virtue of its fast execution, ZeBu-XXL will significantly accelerate the debugging of Renesas’ designs and ultimately speed time to market of its new designs.”
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