CIMdata PLM Industry Summary Online Archive
23 February 2009
Implementation Investments
QThink Design Services Adopts Magma's Titan and Talus to Implement Next-Generation Mixed Signal Designs
Magma® Design Automation Inc., a provider of chip design software, announced that QThink® Design Services has added Titan™ Chip Finishing to its Talus®-based design flow to implement next-generation digital and mixed-signal designs. By leveraging Titan's integration with the Talus IC implementation system, QThink can automate what are traditionally manual, repetitive and time-consuming steps in the chip finishing process, allowing them to provide their customers with shorter development cycles and reduced development costs.
"With third-party chip finishing, an inordinate amount of time is spent performing manual chip integration tasks such as top-level routing, connecting to the package routing layers, implementing last minute ECOs and adding manufacturing data," said Urban Jangren, vice president of Engineering at QThink. "Titan is significantly faster and provides higher capacity than any other chip finishing tool we've used. It has turned several days of manual work into a scripted flow executed in minutes"
"The Magma software offers the highest level of integration and automation, allowing designers to deliver ICs with better quality of results with less effort and in less time," said Suk Lee, general manager of Magma's Custom Design Business Unit. "QThink's decision to use the Magma software is a strong endorsement of its ability to improve designer productivity."
Titan: Lightning-Fast, Automated Chip Finishing and Live Integration with Digital Implementation
In traditional flows, chip finishing -- the point at which the digital and analog blocks of a design are integrated together -- is a time-consuming and manual task. Titan Chip Finishing provides complete and automated chip finishing capabilities. This fast, high-capacity system integrates mixed-signal layout with the Talus place-and-route capabilities. Titan Chip Finishing can manipulate the largest designs with ease, automates analog and special-net routing through an efficient constraints-based approach and makes all mixed-signal layout changes immediately available for physical and timing verification sign-off analysis through a live interface with Talus, Quartz™ DRC and Quartz LVS. Titan Chip Finishing can implement late engineering change orders (ECOs) that affect both analog and standard-cell components without significantly delaying the schedule.
About QThink
QThink is a global leader in providing ASIC and SoC design services to leading semiconductor companies worldwide. QThink offers flexible technical and business engagement models spanning the full range of implementation tasks, from architecture and specification through logic design, verification, and physical implementation. QThink's optimized methodology, coupled with our extensive team of design experts, has continuously demonstrated on-time delivery and right-by-construction silicon tape-outs for complex designs ranging from 130 to 45 nanometers. Partnering with QThink has allowed our customers to lower their operating costs as proven by successful delivery of over 200 designs to date through our design centers in San Diego, San Jose, and Bangalore, India.
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