CIMdata PLM Industry Summary Online Archive

24 January 2012

Implementation Investments

Altera Adopts the Mentor Graphics Veloce Hardware Emulator to Accelerate Time-to-Market for their Next-Gen Products

Mentor Graphics Corp. announced that Altera, a leader in innovative custom logic solutions, has adopted the Veloce® emulator platform for the accelerated verification of its next-generation products. Altera’s solutions target a wide range of applications, including automotive, broadcast, computer and storage, consumer, industrial, medical, military, test and measurement, wireless, and wireline.

Altera chose the Veloce platform due to its high runtime performance, fast compiler technology, ease-of-use, excellent debug capabilities, and the ability to mix transaction-based acceleration and traditional in-circuit emulation (ICE) modes of operation. Additionally, the ability to use the Veloce platform as a shared resource across their global development teams was a considerable benefit to Altera.

“The level of integration in leading-edge FPGAs requires that we leverage the most sophisticated emulation and verification tools so that we can achieve our time-to-market goals, performance requirements, and minimize design risks in our latest device portfolio,” said David Moore, director, software and IP engineering at Altera. “Using Mentor’s Veloce platform lets us quickly and accurately exercise hardware designs at performance levels orders of magnitude higher than that achievable by RTL simulation and enables greatly reduced debug cycles as a result.”

The Veloce platform, with dual mode accelerator and emulator, provides high performance for both transaction-based verification and traditional in-circuit emulation (ICE). With an extensive portfolio of both physical and virtual vertical market solutions, the Veloce platform is the platform of choice for multimedia, networking, wireless, storage, and embedded systems applications.

”We have worked closely with Altera to provide the best possible emulation solution that meets Altera’s needs and allows them to accurately verify their next-generation designs,” said Eric Selosse, Mentor Emulation Division (MED) vice president and general manager. “We are delighted that Altera benefits from our latest-generation Veloce emulators, and that they have adopted our high-performance, transaction-based acceleration (TBX), and iSolve™ vertical solutions for the validation of industry-standard on-chip protocols.”

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