CIMdata PLM Industry Summary Online Archive
23 January 2012
Events News
Agilent Technologies to Demonstrate Newest High-Speed Digital Design and Test Solutions at DesignCon 2012
Agilent Technologies Inc. announced it will demonstrate its high-speed digital test solutions at DesignCon 2012, Jan. 31- Feb. 1, at the Santa Clara Convention Center (Booth 201).
Agilent's high-speed digital solutions offer a wide range of essential tools to help engineers design and simulate, analyze, debug and achieve compliant designs while cutting through the challenges of gigabit digital designs.
Agilent experts at DesignCon will demonstrate how to:
Build repeater models with SystemVue (saving months of programming time compared to hand coding in C), then integrate them into a complete end-to-end ADS channel simulator.
Generate and analyze 28-Gb/sec designs accurately and reliably using the most flexible jitter generator and analyzer with the lowest intrinsic jitter in products such as the J-BERT N4903B, N4876A 28-Gb/s Multiplexer 2:1, and the 86100D DCA-X sampling oscilloscope.
Ensure next-generation high-speed digital verification and compliance with ENA Option TDR, a comprehensive signal-integrity measurement solution that includes Hot TDR measurements and stressed-eye diagram analysis of interconnects.
Characterize frequency-domain behaviors of PDN components using the E5061B LF-RF network analyzer, which fully supports milliohm impedance and gain-phase measurements for DC-DC converters, bypass capacitors and PCBs.
Perform physical-layer tests with the PLTS 2012, which includes new, industry-first breakthrough analysis capabilities for MATLAB connectivity, multiple aggressor crosstalk eye-diagram analysis and second THRU for asymmetric automatic fixture removal.
Take advantage of the tools that USB test labs and the USB-IF are using to validate and debug USB SuperSpeed designs with Agilent's complete suite of tools for all protocol, transmitter, and receiver testing.
Accurately minimize the problems inherent in faster memory designs by pinpointing the issues using Agilent's DDR analysis tools and new logic analyzer.
Agilent will also be doing live demos of transmitter, receiver and protocol testing with new tools for PCIe® 3.0. The new N4880A reference clock multiplier enables accurate receiver testing of PCIe mainboards without complex setups. Plus, see how the latest versions of Agilent's N5990A test automation software increase R&D efficiency with support for PCIe 3.0 Base and CEM specification testing.
Agilent experts will present the following papers at the conference:
"Probability Distributions of Random Errors in Frequency-Domain Measurements“)
"Optical Technologies for Off-Chip and On-Chip Interconnects"
"Advances in ATE Fixture Performance and Socket Characterization for Multi-Gigabit Applications"
"Characterizations of Real Asymmetric Fixtures Using a Two-Gate Approach"
"Efficient End-to-End Simulations of 25G Optical Links"
Agilent will also participate in an educational forum called Design and Test Challenges in Next Generation High-Speed Serial Standards, Jan. 30 from 1:30 to 4:30 p.m. and Feb. 1 from 8:30 to 11:30 a.m., in the second-floor theater of the Santa Clara Convention Center. The standards include PCIe 3, DDR 3/4, USB 3, and FPGA 28-Gb/s serial. To sign up for the forum, visit www.agilent.com/find/hsd.
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