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Friday, September 28, 2018

DVCon Europe 2018 Announces Keynote Speakers Philippe Magarshack of ST Microelectronics and Stefan Jockusch of Siemens PLM Software

The Design and Verification Conference (DVCon) Europe 2018, taking place in Munich, Germany on October 24th and 25th, 2018 has announced two keynote speakers. Dr. Stefan Jockusch, the vice president of strategy at Siemens PLM Software, Inc. will deliver a speech entitled “Driving Digitalization With A Boundary Free Innovation Platform.” Philippe Magarshack, group vice president of the MDG Group at ST Microelectronics will present “Accelerating IoT Device Development – from Silicon to Developer Tools.” Both keynote speeches are synonymous with a rich conference program centered around the application of design and verification methodologies and standards and address emerging topics such as Machine Learning, Automotive Safety and Security, and the Internet of Things.

“This year’s DVCon Europe introduces a variety of exciting, innovative topics of great interest to the European design and verification community, including functional safety, virtual prototyping, machine learning, portable stimulus, RISC-V and many more,” noted Martin Barnasconi, DVCon Europe 2018 general chair. “We’ve created a strong technical program, which will be complemented with two fantastic keynotes presented by Stefan Jockusch and Philippe Magarshack, two well-known players in the European electronics community in driving innovation and leading edge technologies across our continent.”

Dr. Jockusch’s keynote, “Driving Digitalization With A Boundary Free Innovation Platform” will be on October 24th, the first day of the conference.  We are witnessing a radical change of the way products are created, produced, and utilized. As a consequence of continuing digitalization, leading technology companies are pursuing the idea of a complete, high fidelity “digital twin” that makes the boundaries between the design process of mechanical parts, electronics, embedded software, sensors and specialized IC and sensor technology disappear. The talk will discuss how this digital twin is affecting autonomous driving, additive manufacturing, IoT technology and many other applications.

On October 25th Mr. Magarshack will deliver the second conference keynote address, “Accelerating IoT Device Development – from Silicon to Developer Tools.”  The Internet of Things is accelerating thanks to the broad availability of affordable building blocks for IoT devices combined with ubiquitous wireless connectivity, cloud computing and artificial intelligence. The development of IoT SoCs pose a number of challenges for chipmakers in order to enable successful first silicon and fast bring-up. This talk addresses these topics as well as some of the perspectives for IoT applications.

Registration is now open for DVCon Europe 2018. The conference’s focus on practical applications of the latest design and verification techniques employed on electronic semiconductors and systems has assured its position as the premier event for electronic design and verification engineers. It attracts many hundreds of industry stakeholders who come to learn about new methodologies, tools, standards and techniques that further their organization’s opportunities for innovation.

The conference program offers a broad and extensive range of tutorials, papers, panels, and keynote speeches. The event also includes an exhibition, receptions and other opportunities for industry networking and interaction. With the addition of a fourth track, the program covers:

  • System Level Design and Software Driven Verification
  • Advanced Verification & Validation
  • Functional Safety and Machine Learning Applications
  • IP Reuse and Design Automation
  • Analog and Mixed-Signal Design & Verification
  • Open Source Processor and IP Methodologies

This year’s conference is co-located with the third SystemC Evolution Day, a full day technical workshop on the SystemC standard and ecosystem, to be held on October 23rd, 2018. In several in-depth sessions, selected current and future standardization topics around SystemC will be discussed in order to accelerate their progress for inclusion in future Accellera/IEEE standards.

To view the original press release, please click here.

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