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Wednesday, October 17, 2018

Cadence to Demonstrate System and Automotive Solutions at Arm TechCon 2018

Cadence Design Systems, Inc. announced it will showcase Arm-optimized solutions for chips, boards and systems at Arm® TechCon 2018. Additionally, Cadence will showcase its automotive design and verification solutions in the Arm TechCon Automotive Pavilion. The event is being held at the San Jose Convention Center in San Jose, Calif., from October 16 to October 18, 2018, with Cadence, a diamond sponsor, in Booth 733. To register for the conference, visit www.armtechcon.com. 

WHAT:

  • Cadence, customer and partner technical experts are scheduled to deliver several presentations developed for the Arm community. The speaking sessions are as follows:
  • Optimizing Hardware/Software Development for Arm-Based Embedded Designs: Tuesday, October 16, 11:30 a.m., Executive Ballroom 210H, Arm and Cadence
  • Automated Identification of Embedded Physical Memories Using Shared Test Bus Access in IP Cores: Tuesday, October 16, 2:30 p.m., Executive Ballroom 210F, Arm and Cadence
  • High-Performance CPU Implementation at TSMC N7 Node Using Cadence Innovus™ Implementation System: Wednesday, October 17, 1:30 p.m., Executive Ballroom 210B, HiSilicon and Cadence
  • Achieving High-Performance Verification on Arm-Based Servers: Wednesday, October 17, 2:30 p.m., Executive Ballroom 210B, HP Enterprise, Marvell, Arm and Cadence
  • Meeting Functional Safety Requirements for the Next Generation of Automotive Applications: Wednesday, October 17, 3:30 p.m., Executive Ballroom 210B, Arm and Cadence

The Cadence booth will feature demonstrations that will enable customers to learn to:

  • Achieve high-performance verification on Arm-based servers
  • Complete fast, low-risk SoC implementations using Arm System Guidance for Infrastructure (SGI) configuration information and Cadence® Rapid Adoption Kits (RAKs)
  • Perform tests from the Arm Server Compliance Test Suite implemented in a pre-silicon verification environment using the Cadence Perspec™ System Verifier
  • Achieve early embedded software development and hardware/software integration using the Cadence Protium™ S1 FPGA-Based Prototyping Platform
  • Perform cycle-accurate measurements of transaction latency and bandwidth to improve SoC verification of Arm-based designs with the Cadence Interconnect Workbench and Verification IP for Arm AMBA® protocol

Demonstrations are also planned for the CCIX booth (Booth 1700), where attendees can see a silicon-proven and customer-adopted Cadence 7nm PHY IP operating at 25G.

WHEN: 

Arm TechCon is scheduled from October 16 to October 18, 2018.

WHERE: 

Cadence is located in Booth 733 at the San Jose Convention Center in San Jose, Calif.

To view the original press release, please click here.

Search for Cadence Design Systems on CIMdata.com

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