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Industry Summary Articles

Wednesday, October 24, 2018

Synopsys Custom Design Platform Delivers Breakthrough Analog Simulation and Fusion Technologies

Highlights:

·         FineSim SPICE 2018.09 delivers 3X faster runtime for analog circuits, adds RF analysis features

·         Custom Compiler's Extraction Fusion with StarRC provides early parasitics for accurate pre-layout simulation

·         Custom Compiler's DRC Fusion with IC Validator reduces late-cycle iterations with live DRC checking

Synopsys, Inc.  announced that its Custom Design Platform has been enhanced with innovative new FineSim® SPICE circuit simulation and Custom Compiler custom layout technologies to address the growing needs of accelerating robust analog/mixed-signal (AMS) designs at advanced process nodes and high-reliability applications. The new analog simulation technologies in the latest FineSim SPICE release provide 3X faster performance for large post-layout circuits and adds new RF-class analysis capabilities. The 2018.09 release of Custom Compiler provides new Extraction Fusion technology with StarRC parasitic extraction and DRC Fusion technology with IC Validator signoff physical verification that enable tighter design/layout collaboration and fewer late-stage design iterations. Combined with enhancements in Custom Compiler's visually-assisted automation technology, the Synopsys Custom Design Platform delivers new levels of design and layout productivity to accelerate AMS design. (See related Custom Compiler and FineSim SPICE news releases.)

"We deployed the Synopsys Custom Platform to design our high-performance mixed-signal SoC because we wanted a flexible, productive solution for advanced-node custom design," said Ken Evans, Managing Technologist at Seagate. "The Synopsys platform was easy for our designers to learn, and we saw significant productivity gains throughout the design process, especially for mixed-signal simulation, layout, and physical verification."

Seagate and other industry leaders highlighted their experiences in achieving significant productivity gains by adopting the Synopsys Custom Design Platform at the 2018 Design Automation Conference (DAC). Videos of these presentations are available on the Synopsys web site.

The Synopsys Custom Design Platform is a unified suite of design and verification tools that accelerates the development of robust custom and AMS designs. Anchored by the Custom Compiler custom design environment, the platform features industry-leading circuit simulation performance, a fast, easy-to-use custom layout editor complemented with best-in-class technologies for parasitic extraction, reliability analysis, and physical verification.

Key features of the Custom Design Platform include reliability-aware verification, visually-assisted layout, and Extraction Fusion and DRC Fusion technologies. Reliability-aware verification ensures robust AMS design with signoff-accurate transistor-level EM/IR analysis, large-scale Monte Carlo simulation, aging analysis, and other verification checks. Visually-assisted automation is a pioneering approach to reducing layout effort, especially for advanced-node designs, that is proven to deliver 2-10X higher productivity. Extraction Fusion and DRC Fusion technologies shorten time to design closure and reduce late iterations.

The Synopsys Custom Design Platform is based on the OpenAccess database, includes open APIs for third-party tool integration, and supports programming in TCL and Python. Platform tools include HSPICE® and FineSim® SPICE circuit simulators, CustomSim FastSPICE, Custom Compiler layout and schematic editor, StarRC parasitic extraction, and IC Validator physical verification. For more information, visit www.customcompiler.info.

"Custom and AMS design teams demand faster circuit simulation and better layout productivity, driven by the growing complexities of designing and laying-out analog circuits in advanced process nodes," said Michael Jackson, corporate vice president of marketing for the Design Group at Synopsys. "The new breakthrough simulation performance in the latest release of FineSim SPICE, combined with Custom Compiler's fusion with industry-golden StarRC signoff analysis and IC Validator, provide a highly productive custom design platform to accelerate robust AMS design." 

To view the original press release, please click here.

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