Accellera Systems Initiative (Accellera), electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced today that the Accellera Universal Verification Methodology (UVM) Working Group has released the UVM 2017-1.0 reference implementation.
“We have been very focused on updating the UVM reference implementation to match the new IEEE 1800.2 standard,” stated Justin Refice, Chair of the UVM Working Group. “We are aligned with the enhancements that make it more powerful and easier to use, and we have worked hard to address some inconsistencies between the UVM Register Layer and other standards. Our working group received a lot of feedback on the 0.9 release, and we were able to fix the bugs that were reported. UVM 2017-1.0 also includes full documentation of the API that is provided in addition to 1800.2-2017.”
The UVM 2017-1.0 reference implementation can be downloaded for free from Accellera. The IEEE 1800.2-2017 standard is available free of charge from the IEEE Get program, courtesy of Accellera. Visit the UVM forum to provide feedback, ask questions, and engage in discussions. For more information on UVM, visit the UVM community page .
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