"We selected Synopsys as our EDA partner to help us accelerate our spatial sensing solution and battery sensing solution for automotive and industrial market," said Hiroyuki Tsujikawa, Director at Panasonic Semiconductor Solutions Co., Ltd.. "Synopsys demonstrated that they could respond rapidly to our requirements, and we moved our legacy designs and design flows to Synopsys in just a few months."
Synopsys' Custom Design Platform is based on the Custom Compiler design and layout environment and includes HSPICE®, FineSim® SPICE, and CustomSim™ FastSPICE circuit simulation, Custom WaveView™ waveform display, StarRC™ parasitic extraction, and IC Validator physical verification.
Key features of the Custom Design Platform include reliability-aware verification, Extraction Fusion technology, and visually assisted layout. Reliability-aware verification ensures robust analog/mixed-signal (AMS) design with signoff-accurate transistor-level EM/IR analysis, large-scale Monte Carlo simulation, aging analysis, and other verification checks. Extraction Fusion technology with StarRC parasitic extraction reduces design closure time by enabling accurate parasitic simulation before layout is complete. Visually-assisted automation is a pioneering approach to reducing layout effort that is proven to deliver higher productivity.
"Panasonic is one of several full-flow competitive displacements we've achieved this year from customers seeking better overall design productivity, industry-leading circuit simulation performance, and gold-standard extraction and simulation accuracy." said Aveek Sarkar, vice president, AMS customer success and product management at Synopsys. "We welcome Panasonic to our rapidly growing community of full-flow custom design customers."
