Cadence Design Systems, Inc. announced that the Cadence® digital full flow achieved certification for the GlobalFoundries (GF) 12LP/12LP+ process platforms to advance the design of aerospace, hyperscale computing, AI, mobile and consumer applications. The certification confirms that the Cadence digital full flow has met all of GF’s accuracy, integration and quality of results (QoR) criteria specified for the 12LP/12LP+ process platforms, enabling mutual customers to reach power, performance, and area (PPA) goals faster and to deliver new products to market with shorter design cycles.
The Cadence tools were optimized for the GF 12LP/12LP+ process platforms and certified using an industry-standard high-efficiency processor core. The certified tools include the Innovus™ Implementation System, Genus™ Synthesis Solution, Tempus™ Timing Signoff Solution, Voltus™ IC Power Integrity Solution, Quantus™ Extraction Solution, Litho Physical Analyzer (LPA) and Pegasus™ Verification System.
The digital full flow provides additional benefits to GF 12LP/12LP+ users through the Cadence iSpatial technology, which allows a seamless transition from Genus physical synthesis to Innovus implementation using a common user interface and database. The flow also provides unified implementation, timing- and IR-signoff engines, offering enhanced signoff convergence by concurrently closing the design for all physical, timing and reliability targets.
“The Cadence digital full flow certification on our 12LP/12LP+ process platforms validates the accuracy of the implementation and signoff methodology,” said Richard Trihy, vice president of design enablement at GF. “Through our collaboration, we’re providing our customers with a trusted solution to speed up the implementation process, which is particularly critical for those creating emerging aerospace, hyperscale computing and AI applications and experiencing great pressure to deliver new products to market quickly.”
“Through the integration and innovation offered by our digital full flow, customers using GF’s 12LP/12LP+ process platforms can confidently converge on their PPA targets faster,” said Kam Kittrell, senior group director, product management, in the Digital & Signoff Group at Cadence. “The thorough correlation checks performed by GF on the Cadence digital full flow gives users an added level of assurance that they can implement high-performance designs quickly in order to remain competitive in their respective markets.”
The Cadence digital full flow provides better predictability and a faster path to design closure and supports Cadence’s Intelligent System Design™ strategy, which enables SoC design excellence.
